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Раздел 6 Третье занятие

245

responding address in main memory. The address comparator checks the address cell contents against the address on the memory address bus. If they match, the contents of the data are placed on the data bus.

An ideal cache memory would have many cache memory cells, each holding a copy of the most frequently used main-memory data. This type of cache memory is called fully associative because access to the data in each memory cell is through the data’s associated, stored address.

Not all locations in the memory address space should be cached. Hardware I/O address shouldn’t be cached because bits in an I/O register can and must change at any time, and a cache copy of an earlier I/O state may not be valid.

    1. Переведите предложения, учитывая средства и способы оформления инверсии.

  1. Not only does the computer make the collection procedure easier but it makes feasible unattended data collection.

  2. Should an error occur for any reason during the running of the program, the program terminates by indicating what the error number is and in which line it occurred.

  3. Among the parameters studied was the consumption of the start­ing material.

  4. Had we to use the same number of vacuum tubes instead of transis­tors, our modem electronic systems would be wholly impractical.

  1. Контроль умения аннотировать и реферировать.

Текст 6.3 С

Прочитайте текст. Скажите, что вы узнали о CCD, a ferrite core memory, the bubble memory.

Further Memory Developments

The solution to the memory problem in computers made a signif­icant transition in the early 1950’s with the development of ferrite core memories.

Magnetic ferrites being made of ceramic rather than metal were capable of providing a much shorter access time through electronic

246

Микроэлектроника настоящее и будущее

circuitry than the drums, tapes and discs which were based on metallic magnetics and mechanical access times. The gap between mechanical access times and electronic access time of the core is between 10 sec­onds and 100 seconds.

With the development of integrated circuits the first trend toward what is now called large-scale integrated circuits or LSI was the devel­opment of scratch pad memories using bipolar transistors made in large quantities on one large substrate. This was followed almost immedi­ately by the development of MOS random-access memories (RAMs) with 1 to 16 К capacity. The access times to the bipolar memories are in the order of 1 to 10 nanoseconds and for MOS memories on the order of 100 nanoseconds.

More recently we have been able to return to the concept used years ago of the recirculating delay line by using charge transfer cou­pled devices in a shift register configuration which recirculates bits and is accessed in a serial fashion. Because of the serial access, access time is slower — of the order of 2 milliseconds with a data rate of one mega­hertz.

The bubble memory first described in 1967 is now a reality with the advantage of high capacity, of the order of 500 kilobits, but with the disadvantage of bit rates of a few hundred kilobits per second com­pared to the megabits per sccond possible in charge transfer devices.

All of these recent developments, the MOS, RAM, CCD, and bubble are in the gap between the mechanical access memories and the higher speed MOS devices and bipolar memories.

  1. Контроль умения говорить.

    1. Ответьте развернуто на следующие вопросы:

  1. What are the most important characteristics of memory?

  2. What do you know about different types of memories?

  3. What do you know about analogue and digital recording?

  4. Can you compare random access memories and serial access mem­ories?

  5. What developments can be expected by the end of the century in the field of computer memories?

  6. What is being done at present to improve memory capacity and speed?

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