- •Contents
- •Preface
- •Related Documents
- •Typographic and Syntax Conventions
- •Creating HDL Modules for CDBA Cellviews
- •Creating HDL Data as You Save CDBA Cellviews
- •Creating HDL Data from Pre-existing CDBA Cellviews
- •Quick-Start Tutorial
- •The Circuit
- •AMS Designer Tools
- •Setting Up the Tutorial
- •Running from a Script
- •Running within the AMS Environment
- •Opening the Command Interpreter Window
- •Netlisting and Compiling
- •Elaborating and Simulating the Design
- •Summary
- •Setting Up the AMS Environment
- •Overview
- •The hdl.var File
- •The ams.env Files
- •AMS Designer Supports Design Management
- •Specifying the Text Editor to Use
- •Specifying Fonts for the Cadence Hierarchy Editor
- •Preparing to Use AMS Designer from the Hierarchy Editor
- •Netlisting
- •Netlisting Modes Supported by the AMS Netlister
- •Automatic Netlisting of a Cellview
- •Netlist Updating and Netlisting of Entire Designs
- •Netlisting from the UNIX Command Line
- •Library Netlisting
- •Netlisting of Cells in Response to Changes in CDF
- •Preparing Existing Analog Primitive Libraries for Netlisting
- •Specifying the Behavior of the Netlister and Compilers
- •Opening the AMS Options Windows
- •Setting Netlister Options from the Hierarchy Editor
- •Opening the CIW AMS Options Window
- •Setting Compiler Options
- •Viewing the AMS Netlister Log
- •Understanding the Output from the AMS Netlister
- •How Inherited Connections Are Netlisted
- •Inherited Signal Connections
- •Inherited Terminal Connections
- •Instance Values for Inherited Connections
- •Third-Party Tools and Other Cadence Tools
- •How Aliased Signals Are Netlisted
- •How m-factors (Multiplicity Factors) Are Netlisted
- •How Iterated Instances Are Netlisted
- •Passing Model Names as Parameters
- •Effect of the modelname, model, and modelName Parameters
- •Handling of the model* and componentName Parameters
- •Precedence of the model* and componentName Parameters
- •Specifying Parameters to be Excluded from Netlisting
- •Ignoring Parameters for Entire Libraries
- •Example: Specifying Parameters to Ignore
- •Ensuring that Floating Point Parameters Netlist Correctly
- •Working with Schematic Designs
- •Setting Schematic Rules Checker Options for AMS Designer
- •Creating Cellviews Using the AMS Environment
- •Preparing a Library
- •Creating the Symbol View
- •Using Blocks
- •Descend Edit
- •Inherited Connections
- •Global Signals in the Schematic Editor
- •Inherited Connections in a Hierarchy
- •How Net Expressions Evaluate
- •Net and Pin Properties
- •groundSensitivity and supplySensitivity Properties
- •Making Connect Modules Sensitive to Inherited Connection Values
- •Using External Text Designs
- •Overview of Steps for Using External Text Designs
- •Bringing Modules into a Cadence Library
- •Specifying the Working Library
- •Compiling into Libraries
- •Compiling into Temporary Libraries
- •Listing Compiled Modules
- •Using Text Blocks in Schematics
- •Using Modules Located in a Cadence Library
- •Preparing for Simulation
- •Using Analog Primitives
- •Using SPICE and Spectre Netlists and Subcircuits
- •Preparing to Use SPICE and Spectre Netlists and Subcircuits
- •Placing SPICE and Spectre Netlists and Subcircuits in a Schematic
- •Using Test Fixtures
- •Creating and Using a Textual Test Fixture
- •Creating a Textual Test Fixture
- •Using a Test Fixture
- •Example: Creating and Using a Test Fixture
- •Using Design Configurations
- •Ensuring HDL Design Unit Information Is Current
- •Preparing a Design for Simulation
- •Overview of AMS Design Prep
- •What AMS Design Prep Does to Prepare a Design for Simulation
- •When to Use AMS Design Prep
- •Specifying the Behavior of AMS Design Prep
- •Setting Options for Global Design Data
- •Specifying Global Signals
- •Specifying Design Variables
- •Specifying Model Files to Use During Elaboration
- •Running AMS Design Prep
- •The cds_globals Module
- •Global Signals
- •Design Variables
- •Setting Elaborator Options
- •Setting Simulator Options
- •Setting Waveform Selection Options
- •Creating Probes
- •Selecting Instances from the Virtuoso Schematic Editing Window
- •Selecting Buses
- •Selecting Instances from the Scope Navigator
- •Copying and Pasting Within Tables
- •Elaborating and Simulating
- •Viewing Messages
- •Plotting Waveforms After Simulation Ends
- •Starting the SimVision Waveform Viewer
- •Plotting Waveforms Selected on a Schematic (Direct Plot)
- •Using the amsdesigner Command
- •Examples
- •Producing Customized Netlists
- •Producing Customized Netlists
- •Identifying the Sections of a Netlist
- •Using ams.env Variables to Customize Netlists
- •Using Netlisting Procedures to Customize Netlists
- •Examples: Problems Addressed by Customized Netlists
- •Example: Adjusting Parameter Values to Account for Number of Fingers
- •Example: Using Symbols that Represent Verilog Test Code
- •Data Objects Supported for Netlisting
- •Netlister Object
- •Formatter Object
- •Cellview Object
- •Parameter Object
- •Instance Object
- •SKILL Functions Supported for Netlisting
- •Default Netlisting Procedures
- •Netlisting Helper Functions
- •Variables for ams.env Files
- •How AMS Designer Determines the Set of Variables
- •Why AMS Designer Uses ams.env Files, Not .cdsenv Files
- •List of ams.env Variables
- •Detailed Descriptions of ams.env Variables
- •aliasInstFormat
- •allowDeviantBuses
- •allowNameCollisions
- •allowSparseBuses
- •allowUndefParams
- •amsCompMode
- •amsDefinitionViews
- •amsEligibleViewTypes
- •amsExcludeParams
- •amsExpScalingFactor
- •amsLSB_MSB
- •amsMaxErrors
- •amsScalarInstances
- •amsVerbose
- •analogControlFile
- •bindCdsAliasLib
- •bindCdsAliasView
- •cdsGlobalsLib
- •cdsGlobalsView
- •checkAndNetlist
- •checkOnly
- •checktasks
- •compileAsAMS
- •compileExcludeLibs
- •compileMode
- •connectRulesCell
- •connectRulesCell2
- •connectRulesLib
- •connectRulesView
- •detailedDisciplineRes
- •discipline
- •excludeViewNames
- •hdlVarFile
- •headerText
- •ieee1364
- •ifdefLanguageExtensions
- •incdir
- •includeFiles
- •includeInstCdfParams
- •initFile
- •instClashFormat
- •iterInstExpFormat
- •language
- •lexpragma
- •logFileAction
- •logFileName
- •macro
- •maxErrors
- •messages
- •modifyParamScope
- •ncelabAccess
- •ncelabAnnoSimtime
- •ncelabArguments
- •ncelabCoverage
- •ncelabDelayMode
- •ncelabDelayType through ncelabMessages
- •ncelabMixEsc
- •ncelabModelFilePaths
- •ncelabNeverwarn through ncelabVipdelay
- •ncsimArguments
- •ncsimEpulseNoMsg through ncsimExtassertmsg
- •ncsimGUI
- •ncsimLoadvpi through ncsimStatus
- •ncsimTcl
- •ncsimUnbuffered through ncsimUseAddArgs
- •ncvhdlArguments
- •ncvlogArguments
- •ncvlogUseAddArgs
- •netClashFormat
- •netlistAfterCdfChange
- •netlistMode
- •netlistUDFAsMacro
- •neverwarn
- •noline
- •nomempack
- •nopragmawarn
- •nostdout
- •nowarn
- •paramDefVals
- •paramGlobalDefVal
- •pragma
- •processViewNames
- •prohibitCompile
- •runNcelab
- •runNcsim
- •scaddlglblopts
- •scaddltranopts
- •scale
- •scalem
- •scannotate
- •scapprox
- •scaudit
- •sccheckstmt
- •sccmin
- •sccompatible
- •scdebug
- •scdiagnose
- •scdigits
- •scerror
- •scerrpreset
- •scfastbreak
- •scgmin
- •scgmincheck
- •schomotopy
- •sciabstol
- •scic
- •scicstmt
- •scignshorts
- •scinfo
- •scinventory
- •sclimit
- •sclteratio
- •scmacromod
- •scmaxiters
- •scmaxnotes
- •scmaxrsd
- •scmaxstep
- •scmaxwarn
- •scmethod
- •scmodelevaltype
- •scmosvres
- •scnarrate
- •scnotation
- •scnote
- •scopptcheck
- •scpivabs
- •scpivotdc
- •scpivrel
- •scquantities
- •screadic
- •screadns
- •screlref
- •screltol
- •scrforce
- •scscale
- •scscalem
- •scscftimestamp
- •scscfusefileflag
- •scskipcount
- •scskipdc
- •scskipstart
- •scskipstop
- •scspeed
- •scstats
- •scstep
- •scstop
- •scstrobedelay
- •scstrobeperiod
- •sctemp
- •sctempeffects
- •sctitle
- •sctnom
- •sctopcheck
- •sctransave
- •scusemodeleval
- •scvabstol
- •scwarn
- •scwrite
- •simRunDirLoc
- •simVisScriptFile
- •status
- •templateFile
- •templateScript
- •timescale
- •update
- •use5xForVHDL
- •useDefparam
- •useNcelabNowarn
- •useNcelabSdfCmdFile
- •useNcsimNowarn
- •useNowarn
- •useScaddlglblopts
- •useScaddltranopts
- •useScic
- •useScreadic
- •useScreadns
- •useScwrite
- •useSimVisScriptFile
- •useProcessViewNamesOnly
- •verboseUpdate
- •vlogGroundSigs
- •vloglinedebug
- •vlogSupply0Sigs
- •vlogSupply1Sigs
- •wfDefaultDatabase
- •wfDefInstCSaveAll
- •wfDefInstCSaveLvl
- •wfDefInstSaveCurrents
- •wfDefInstSaveVoltages
- •wfDefInstVSaveAll
- •wfDefInstVSaveLvl
- •wfDefInstVSaveObjects
- •Updating Legacy SimInfo for Analog Primitives
- •The ams Fields
- •Special Handling of model, modelName, modelname, and componentName
- •Converting an Existing Analog Primitive Library
- •Designing for Virtuoso AMS Compliance
- •Terminals
- •Buses
- •Component Description Format
- •Parameters
- •Using Inherited Parameters
- •Using Cell Parameters
- •Parameterized Cells
- •VHDL-AMS Component Declarations
- •Properties
- •Properties to Avoid Completely
- •Avoid the portOrder Property Unless Required by Special Circumstances
- •Properties to Use Only in AMS Compatibility Mode
- •Properties That Have No Special Meaning in the AMS Environment
- •Properties Fully Supported by the AMS Environment
- •SKILL Functions
- •amsCheckCV
- •amsIsPresent
- •amsNetlist
- •amsProcessCellViews
- •amsUIOptionsForm
- •amsUIRunNetlisterForm
- •ddsCvtAMSTranslateCell
- •ddsCvtAMSTranslateLib
- •ddsCvtToolBoxAMS
- •vmsUpdateCellViews
- •Customization Variables
- •schHdlNotCreateDB
- •schHdlUseVamsForVerilog
- •vmsAnalysisType
- •vmsCreateMissingMasters
- •vmsNcvlogExecutable
- •vmsPortProcessing
- •vmsRunningInUI
- •vmsTemplateScript
- •vmsVerboseMsgLevel
- •Compiling Cadence-Provided Libraries
- •Purpose of the amsLibCompile Tool
- •Running the amsLibCompile Tool Manually
- •Example
Virtuoso AMS Environment User Guide
3
Setting Up the AMS Environment
This chapter contains the following sections:
■Overview on page 58
■The hdl.var File on page 58
■The ams.env Files on page 59
■Specifying the Text Editor to Use on page 60
■Specifying Fonts for the Cadence Hierarchy Editor on page 60
■Preparing to Use AMS Designer from the Hierarchy Editor on page 62
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Overview
Several configuration files help you manage your data and control the operation of the tools used in the AMS environment. Among them are
■cds.lib
Defines your design libraries and associates logical library names with physical library locations. For more information, see “The cds.lib File” in the “Setting Up Your
Environment” chapter of the Virtuoso AMS Simulator User Guide.
■hdl.var
Defines variables that affect the behavior of tools and utilities. For more information, see “The hdl.arv File” on page 58.
■setup.loc
Specifies the search order that tools and utilities use when searching for thecds.lib, hdl.var, and ams.env files. For more information, see“The setup.loc File” in the “Setting Up Your Environment” chapter of theVirtuoso AMS Simulator User Guide.
■ams.env
Specifies the basic behavior of AMS Design Prep and the AMS netlister. For more information, see “The ams.env Files” on page 59.
The AMS environment and the AMS simulator operate on and store data in libraries that are organized according to a Library.Cell:View (L.C:V) approach. For more information, see “The Library.Cell:View Approach” in the “Setting Up Your Environment” chapter of theVirtuoso AMS Simulator User Guide.
The hdl.var File
The hdl.var file is an ASCII text file that contains
■Configuration variables, which determine how your design environment is configured. These include
Variables that you can use to specify the work library where the compiler stores compiled objects and other derived data. For Verilog-AMS, you can use the
LIB_MAP or WORK variables.
For Verilog-AMS, variables (LIB_MAP, VIEW_MAP, WORK) that you can use to specify the libraries and views to search when the elaborator resolves instances.
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■Variables that allow you to specify compiler, elaborator, and simulator command-line options and arguments.
■Variables that specify the locations of support files and invocation scripts.
For example, the hdl.var file for the included tutorial contains the following:
softinclude $AMSHOME/tools/inca/files/hdl.var define WORK amslib
define NCVLOGOPTS -linedebug
define VIEW_MAP ($VIEW_MAP, .vs => shell)
You can have more than one hdl.var file. For example, you can have a projecthdl.var
file that contains variable settings used to support all your projects and localhdl.var files, located in specific design directories, that contain variable settings specific to each project, such as the setting for the WORK variable.
For more information about the hdl.var file, see“The hdl.arv File” in the “Setting Up Your Environment” chapter of the Virtuoso AMS Simulator User Guide.
The ams.env Files
The ams.env files are ASCII files that specify the basic behavior of AMS Design Prep and the AMS netlister. Cadence supplies a default ams.env file, which you can change to meet your needs. Perhaps the most convenient way to change the settings is to use the graphical interfaces available by choosing either Tools – AMS – Options from the CIW menu or AMS – Options from the Cadence hierarchy editor menu. For information about using these graphical interfaces, see “Specifyingthe Behavior of the Netlister and Compilers” on page 74. For detailed descriptions of the variables used in the ams.env file, seeAppendix A, “Variables for ams.env Files.”
The Cadence default ams.env file isyour_install_directory/share/cdssetup/ amsDirect/ams.env. You can also have other ams.env files tailored to your needs. The
AMS tools search for such files using the search mechanism described in the“Cadence Setup Search File: setup.loc” chapter of the Cadence Application Infrastructure User Guide.
Day-to-day changes in the ams.env files result from changes you make in the graphical interfaces, but if you need to create or edit an ams.env file directly, be aware of the following:
■Lines beginning with a semi-colon are considered comments.
■AMS Designer never writes comments to the ams.env files that it generates or overwrites. That means that if you add a comment to an ams.env file that AMS Designer reads and then writes, the comment disappears. For example, any comments you add
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to the ams.env file in the run directory disappear as soon as you apply any changes to the options.
AMS Designer Supports Design Management
Design management controls access to design files to ensure that information remains synchronized as the design changes. AMS Designer supports design management for all components of a design except for
■The cds_globals module
■The contents of temporary (TMP) libraries
As described in the Cadence Library Manager User Guide, design management reacts to the settings of certain environment variables, such as CDS_AUTO_CKIN. You might need to change the value of these variables to obtain the design management behavior you want.
Specifying the Text Editor to Use
You can specify the text editor for AMS Designer by defining the UNIX shellEDITOR or CDS_TEXT_EDITOR variables. The value of the CDS_TEXT_EDITOR variable takes precedence over the value of the EDITOR variable. For example, the command
setenv CDS_TEXT_EDITOR emacs
sets up the UNIX environment so that AMS Designer uses the emacs text editor.
Specifying Fonts for the Cadence Hierarchy Editor
By default, the Cadence hierarchy editor uses a variable-width font for messages. However, some messages, such as error messages that include pointers, are best viewed with fixedwidth fonts. The easiest way to view such messages in a fixed-width font is to use the
NCBrowse window. (For more information, see “Viewing Messages” on page 289.) If you prefer to see messages in a fixed-width font in the hierarchy editor, you can change the hierarchy editor font.
For example, you notice a case like the one illustrated below where the error pointer bar is misaligned. The pointer should point to the last character in the initial statement, but does not. The problem arises because the default font used in the hierarchy editor is a variable-
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width font but the alignment of the pointer is calculated as though the font were a fixed-width font.
To align the pointer properly, you can change the variable-width font to a fixed-width font by substituting a statement like
CDS.textFont=courier plain 10
for the original statement in the cdsresource.properties file. (For the steps involved, see “Changing the Hierarchy Editor Fonts” in Chapter 1 of the Cadence Hierarchy Editor
User Guide.)
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