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Virtuoso AMS Environment User Guide

9

Using Design Configurations

This chapter describes how to use the Cadence® hierarchy editor to specify the cellviews that you want to use in your design. The set of rules that defines which cellviews under a cell are part of the design for a given purpose (such as netlisting), is called a configuration. The Cadence hierarchy editor lets you see and helps you understand the hierarchy of cellviews specified by the configuration rules.

This chapter contains the following sections:

Overview of Configurations on page 200

Creating a Config Cellview on page 200

Using VHDL Modules in a Configuration on page 206

Ensuring HDL Design Unit Information Is Current on page 206

Using a Configuration on page 206

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Overview of Configurations

Configurations are a convenient way to work with different cellviews as a design evolves from concept to finish. At the beginning of the design process, for example, you might want to use high-level behavioral modules to describe the overall behavior of a component. Then, you might want to insert modules into test fixtures. Finally, you might want to replace the behavioral description with a detailed schematic. Configurations allow you to do all those tasks easily.

A configuration is stored as a cellview, called aconfig, of the cell. You can have different config cellviews for different purposes.

design_lib

cell

Cell

Config cellviews

schematic

layout

bare_config test_config

 

Cellviews

 

You can make configuration rules defining what views are to be included in the hierarchy at three different levels:

At the global level, using a global view list and stop list

At the cell level, using cell-based view lists, which affect the cell as well as structures below the cell in the hierarchy, and cell bindings.

At the instance level, using instance-based view lists, which affect the instance as well as structures lower in the hierarchy, and instance bindings.

To simulate your design in the AMS environment, you must have a top-level config cellview.

That top-level config can include other config cellviews lower in the hierarchy. (You can, however, run the simulator outside of the environment without using a config cellview.)

Creating a Config Cellview

Your design hierarchy must be specified by a top-level config cellview, which can contain other config cellviews lower in the hierarchy. You can use the Cadence hierarchy editor to create a config cellview from a schematic cellview by following the simplified steps given below. For details of this procedure, see the Cadence Hierarchy Editor User Guide.

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1.From the CIW, choose Tools – Library Manager.

The Library Manager window appears.

2.Highlight the library and cell for which you want to create a config cellview.

3.Choose File – New – Cell View.

The Create New File form appears.

4.In the Tool field, chooseHierarchy–Editor.

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The View Name automatically changes to config.

5. Click OK.

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The Cadence hierarchy editor window and the New Configuration form appear.

6.In the New Configuration form, clickUse Template. The Use Template form appears.

7.Choose AMS or AMS_Compatibility from the Name cyclic field.

The AMS template provides the global bindings that are likely to be most useful for designers who follow the guidelines in this book.

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The AMS_Compatibility template provides global bindings that are likely to be of use with designs that originate in other flows, such as flows that use vhdlNet, verilogIn, or Verimix.

8.Click OK.

The New Configuration form redisplays with the default library list, view list, and stop list for the AMS simulator.

9.Ensure that the Library List includes analogLib if your design has text views that use components from that library.

10.In the New Configuration form, ensure that theLibrary, Cell, and View refer to the cellview from which you want to create a configuration.

11. Click OK.

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The Cadence hierarchy editor redisplays with the default cell bindings.

12.If you need to modify any of the Global Bindings lists, you can type directly in the fields.

For example, VHDL users might want to add a wildcard asterisk to the View List.

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