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For information on the corresponding ams.env variables, see “allowIllegalIdentifiers” on page 370, “allowNameCollisions” on page 372, “allowDeviantBuses” on page 368, and “allowSparseBuses” on page 374.

3. When you are done making changes to the pane, click OK.

Setting Compiler Options

AMS Designer provides many options for the compiler, that allow you to tailor the compiler behavior for your needs. There are two main graphical interfaces that you can use to set the options:

■Through AMS – Options in the Cadence hierarchy editor

For guidance on using this interface, see “Setting Compiler Options from the Hierarchy Editor” on page 98.

■Through Tools – AMS – Options in the CIW

For guidance on using this interface, see “Setting Compiler Options from the CIW” on page 114.

You can set the values of most variables using either of these interfaces. They both operate on the same ams.env file so changes that you make from one interface are reflected in the other.

Setting Compiler Options from the Hierarchy Editor

To review or change compiler options from the Cadence hierarchy editor,

1.From the hierarchy editor, choose AMS – Options – Compiler.

If the AMS menu entry is not visible, follow the instructions in “Preparing to Use AMS Designer from the Hierarchy Editor” on page 62.

The AMS Options window appears.

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2.Expand the Compiler category as necessary to find the options you want to change.

When fully expanded, the Compiler category displays the following subcategories.

3.Highlight the category that you want to change.

The corresponding pane appears. For information about the fields in each pane, see the following cross-references:

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Setting General Compiler Options

To specify an hdl.var file to use and to specify libraries to be excluded from compilation,

1. Select the Compiler category to display the Compiler pane.

2.Type the path and name of the hdl.var file into thehdl.var file field.

An hdl.var file that you specify here is used with the compilers, the elaborator, and the simulator.

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Be sure that the path is fully qualified, either as an absolute path or with environment variables. Otherwise, because the compilers run in the directory from which you start the software but the elaborator and simulator run in the run directory, you might unexpectedly use different hdl.var files.

3.Specify libraries that are not to be compiled.

To enter the library names, type one name at a time into the Library Name field and click Add. The libraries to be excluded from compilation appear in the list below.

In compile all mode (such as when the ams.env compileMode variable is set to "all"), AMS Design Prep, by default, compiles every cell referenced in the design hierarchy. However, when you add names to the Exclude Libraries list, cells in the design hierarchy that belong to a library in the list are not compiled.

Be aware that, by working through the Cadence hierarchy editor, you can still compile modules included in libraries of the Exclude Libraries list. Right-clicking on a module in the Tree, Table, or Instance Table view of a design configuration opens a pop-up menu that includes a Compile Netlist command. This command overrides the more general prohibition on compilation that you can specify in this Compiler form.

For information on the corresponding ams.env variable, see “compileExcludeLibs” on page 397.

Setting Options for the Verilog-AMS Compiler

To specify the behavior of the Verilog-AMS compiler,

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1.Select the Compiler – Verilog-AMS category to display the Verilog-AMS Compiler pane.

2.Fill in and select fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvlog Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

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3.Type any additional arguments that you want the Verilog-AMS compiler to use into the

Additional arguments field.

You must not specify a -log argument because the log is automatically written to the ncvlog.log file in the run directory.

Specifying Macros and Specifying Directories to be Searched

To set options that define macros and specify directories to be searched for include files,

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1.Select the Compiler – Verilog-AMS – Macros/Includes category to display the

Verilog-AMS Macros/Includes pane.

2.To define a macro,

a.Click Add next to the Macro Value column.

A default macro name appears in the Macro Name column.

b.Click the default macro name and change it as necessary.

For more information, see the information about the -define option in the “ncvlog Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

c.Click the corresponding Macro Value cell and type in the value, if any, that you want to use.

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If the value includes a space, enclose the value in quotation marks. For example, you might define a macro as follows:

3.To specify directories to be searched for include files,

a.Click Add next to the Include Directory table.

A default directory name appears in the Include Directory column.

b.Click the default directory name and change it to the actual directory to be searched.

The -incdir option is added to the ncvlog command. For example, you specify include_dir in the Include Directory list. When you compile a Verilog-AMS file, the ncvlog command generated by AMS Designer has the following:

ncvlog

-incdir include_dir

For more information, see the information about the -incdir option in the “ncvlog Command Options” section of the “Compiling Verilog Source Files with ncvlog” in the NC-Verilog Simulator Help.

Specifying Checks

To set options that control checks on Verilog-AMS modules,

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1.Select the Compiler – Verilog-AMS – Checks category to display the Verilog-AMS

Checks pane.

2.Select fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvlog Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

Setting Options for Messages Generated by Compiling Verilog-AMS Modules

To set options that control the output of messages and errors,

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1.Select the Compiler – Verilog-AMS – Messages/Errors category to display the

Verilog-AMS Messages/Errors pane.

2.Select and fill in fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvlog

Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

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Setting Options for the VHDL-AMS Compiler

To specify the behavior of the VHDL-AMS compiler,

1. Select the Compiler – VHDL-AMS category.

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AMS Designer displays the VHDL-AMS Compiler pane.

2.Select and fill in fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvhdl Command Options” section, in the “Compiling VHDL Source Files with ncvhdl” chapter of the NC-VHDL Simulator Help.

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3.Type any additional arguments that you want the VHDL compiler to use into the

Additional arguments field.

You must not specify a -logfile argument because the log is automatically written to the ncvhdl.log file in the run directory.

Setting Options for Messages Generated by Compiling VHDL-AMS Modules

To set options that control the output of messages and errors from the VHDL-AMS compiler,

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1.Select the Compiler – VHDL-AMS – Messages/Errors category to display the

VHDL-AMS Messages/Errors pane.

2.Select and fill in fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvhdl Command Options” section, in the “Compiling VHDL Source Files with ncvhdl” chapter of the NC-VHDL Simulator Help.

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Setting Compiler Options from the CIW

The compiler options available from the CIW interface are organized in the following categories:

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Setting General Compiler Options

To specify an hdl.var file to use,

1.Select Compiler in the Categories field. The associated option field appears.

2.Type the path and name of the hdl.var file into thehdl.var file field.

An hdl.var file that you specify here is used with the compilers, and also with the elaborator and the simulator if you run those tools.

Be sure that the path is fully qualified, either as an absolute path or with environment variables. Otherwise, because the compilers run in the directory from which you start the

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software but the elaborator and simulator run in the run directory, you might unexpectedly use different hdl.var files for different AMS tools.

Setting Options for the Verilog-AMS Compiler

To specify the behavior of the Verilog-AMS compiler,

1.Select Compiler – Verilog-AMS in the Categories field.

The associated option fields appear.

2.Fill in and select fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvlog

Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

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3.Type any additional arguments that you want the Verilog-AMS compiler to use into the

Additional arguments field.

You must not specify a -log argument because the log is automatically written to the ncvlog.log file in the run directory.

Specifying Macros and Specifying Directories to be Searched

To set options that define macros and specify directories to be searched for include files,

1.Select the Compiler – Verilog-AMS – Macros/Includes in the Categories field.

The associated option fields appear.

2.To define a macro,

a.Type a name into the Name field.

b.Type the macro value, if any, into the Value field.

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If the value includes a space, enclose the value in quotation marks. For example, you might define a macro as follows:

c.Click the Add button for Macros.

The macro name and value appear in the table.

For more information about macros, see the information about the -define option in the “ncvlog Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

3.To specify a directory to be searched for include files,

a.Type the name of the directory into the Directory name field.

b.Click the nearby Add button.

The -incdir option is added to the ncvlog command. For example, you specify include_dir in the Directory name list. When you compile a Verilog-AMS file, the ncvlog command generated by AMS Designer has the following:

ncvlog

-incdir include_dir

For more information, see the information about the -incdir option in the “ncvlog Command Options” section of the “Compiling Verilog Source Files with ncvlog” in the

NC-Verilog Simulator Help.

Specifying Checks

To set options that control checks on Verilog-AMS modules,

1. Select Compiler – Verilog-AMS – Checks in the Categories field.

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The associated option fields appear.

2.Select fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvlog Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

Setting Options for Messages Generated by Compiling Verilog-AMS Modules

To set options that control the output of messages and errors,

1. Select Compiler – Verilog-AMS – Messages/Errors in the Categories field.

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The associated option fields appear.

2.Select and fill in fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvlog

Command Options” section, in the “Compiling Verilog Source Files with ncvlog” chapter of the NC-Verilog Simulator Help.

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Setting Options for VHDL-AMS Modules

To specify the behavior of the VHDL-AMS compiler,

1.Select Compiler – VHDL-AMS in the Categories field.

The associated option fields appear.

2. Select and fill in fields as necessary.

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The following table briefly describes the fields. For additional information, see the “ncvhdl

Command Options” section, in the “Compiling VHDL Source Files with ncvhdl” chapter of the NC-VHDL Simulator Help.

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3.Type any additional arguments that you want the VHDL-AMS compiler to use into the

Additional arguments field.

You must not specify a -logfile argument because the log is automatically written to the ncvhdl.log file in the run directory.

Setting Options for Messages Generated by Compiling VHDL-AMS Modules

To set options that control the output of messages and errors from the VHDL-AMS compiler,

1. Select Compiler – VHDL-AMS – Messages/Errors in the Categories field.

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The associated option fields appear.

2.Select and fill in fields as necessary.

The following table briefly describes the fields. For additional information, see the “ncvhdl Command Options” section, in the “Compiling VHDL Source Files with ncvhdl” chapter of the NC-VHDL Simulator Help.