Virtuoso AMS Environment User Guide

Using Design Configurations

13. To save this new config view, selectFile – Save in the hierarchy editor.

For additional background information and more information about creating configurations, see the Cadence Hierarchy Editor User Guide. Continue reading here for information on setting up a configuration for mixed-language designs in the AMS environment.

Using VHDL Modules in a Configuration

To instantiate a VHDL module in a Verilog® -AMS module, you use the architecture view of the

VHDL module in the configuration. For an example that instantiates a VHDL module, see how the vhdl_clock is used in Chapter 2, “Quick-Start Tutorial.”

You can also instantiate Verilog-AMS modules in VHDL modules. For information, see the “Importing Verilog-AMS Modules into VHDL Modules” chapter, in the Virtuoso AMS Simulator User Guide.

Ensuring HDL Design Unit Information Is Current

If you edit an HDL design unit, such as one of the netlists named verilog.vams, using an editor such as vi, you must then run AMS Design Prep to ensure that the hierarchy editor has up-to-date information. Otherwise, design expansion might not result in what you expect.

Using a Configuration

To use a configuration, you pass it to the elaborator and simulator on the command line. If you use the AMS environment, for example, the AMS Run Simulator form prepares an ncelab command like the following:

ncelab amslib.top:config amslib.cds_globals:top_config ConnRules_5V_full -discipline logic -timescale 1ns/1ns -noparamerr -use5x4vhdl

Notice how, in this command, the first object passed toncelab is the configuration, amslib.top:config. Similarly, the command for the simulator is:

ncsim amslib.top:config -amslic -analogcontrol top.sce -GUI -input text.tcl

In this command too, the first object passed is the configuration.

As you use configurations, be aware of the following guidelines.

■Compile the design with the -use5x command line option and ensure that the design is located in a Cadence library. For more information, see the “ncvlog Command Syntax” section, in the “Compiling” chapter, of theVirtuoso AMS Simulator User Guide.

Virtuoso AMS Environment User Guide

Using Design Configurations

■Use the -use5x4vhdl command line option when you elaborate the design. This option applies configurations to VHDL modules. For more information, see the“-USe5x4vhdl Option” section, in the “Elaborating” chapter, of theVirtuoso AMS Simulator User

Guide.

■By default, ncelab places the simulation snapshot in the cellview directory of the first design unit specified on thencelab command line. To specify a different location, use the -snapshot option.

If you develop and simulate your design within the AMS environment, these guidelines are followed automatically.

Virtuoso AMS Environment User Guide

Using Design Configurations