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Virtuoso AMS Environment User Guide

Using External Text Designs

Overview of Steps for Using External Text Designs

The AMS environment works most efficiently with modules that are available in Cadence

Library.Cell:View (5X) libraries. As a result, the strategy for using external text designs is to bring them into a library. A typical simplified series of steps looks like the following:

1.Specify the working library.

2.Use the -use5x option to compile modules into a library.

3.Create symbols for text modules that you plan to place in schematics.

4.Create a configuration that uses the text modules.

5.Run AMS Design Prep to generate a cds_globals module.

6.If necessary, edit the cds_globals module to add information about global variables and design variables found in the text modules.

7.Run the simulation.

These steps are described in more detail in the following sections.

Bringing Modules into a Cadence Library

Bringing modules into Cadence libraries does not mean copying modules into the libraries. Rather, it means establishing appropriate links from the cellview directory in the library to the original source information so that AMS Designer is aware of any changes to that source.

Specifying the Working Library

Some of the ncvlog commands discussed in this chapter compile modules into the working library. You must specify the working library by using the command

DEFINE WORK libraryName

in your hdl.var file.

If your design contains components from more than one library, define the working library to be the one that contains the top level of your design.

For more information, see “The hdl.arv File” on page 58.

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If the access permissions for the working library do not allow writing, you can establish a corresponding temporary library that does allow writing. For more information, see

“Compiling intoemporaryT Libraries” on page 182.

Compiling into Libraries

To bring modules into the working library, compile them with the ncvlog or ncvhdl commands using the -use5x option. For example, the command

ncvlog -ams -use5x master.vams

adds a cell named master, with the default view name module, to the current working library.

The command

ncvhdl -v93 -ams -use5x daconv2.vhd

where the daconv2.vhd file contains specifications for an entity nameddaconv2 and an architecture named daconv2_behav, adds a cell named daconv2 with views named entity and daconv2_behav, to the current working library.

The module to be added to the library can be located in any directory. The following example illustrates this usage by specifying the path to the module.

ncvlog -ams -use5x /mnt4/lgp/master.vams

If the file you are working with contains more than one module, you can specify the module to be compiled. For example, the following command compiles the master1 Verilog-AMS module, which is located in the filemaster.vams.

ncvlog -ams -use5x -specificunit ncvlog_lib.master1:behavioral master.vams

This command adds a cell called master1, with a view called behavioral, to the ncvlog_lib library. The new behavioral view contains the master1 module from the master.vams file.

If you need to bring primitives into a 5X library system, compile them into a library that is used only by primitives. As described in “Using Modules Located in a Cadence Library” on

page 186, you need to use the Conversion Tool Box to convert primitive cells for use with AMS

Designer, but you must avoid converting non-primitive cells. Because the Conversion Tool

Box operates on entire libraries, the conversion process requires that the two kinds of cells be located in different libraries.

For detailed information about compiling into libraries, see Chapter 7 of Cadence

NC-Verilog Simulator Help and Chapter 6 of Cadence NC-VHDL Simulator Help.

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Compiling into Temporary Libraries

If the access permissions for a library do not allow writing, you can establish a corresponding temporary (TMP) library that does allow writing. For more information, see “CadenceLibrary Structure”, in the Cadence Application Infrastructure User Guide.

By default, only derived data is allowed in TMP libraries. This means that if the non-writable library already contains a particular cellview, you can compile it into a TMP library. Even with an associated temporary library, though, you are not allowed to add new views or new cells to a non-writable library. That restriction presents no problem when you want to use only cells and views that already exist in the library. However, if you want to add a new cell or view to the library, perhaps to substitute a new behavioral view for an existing library schematic view, the derived data restriction becomes an obstacle.

To circumvent this restriction, Cadence provides the CDS_BIND_TMP_DD shell environment variable.

CDS_BIND_TMP_DD Shell Environment Variable

The CDS_BIND_TMP_DD variable allows cells and views to be created in TMP libraries, even when corresponding master data does not exist in the master library. Using this variable allows some Cadence tools to create cell and view master data in TMP libraries, a behavior that is otherwise prohibited. The CDS_BIND_TMP_DD variable is most useful when the master library is read-only and you need to make new cells or views available for use in your design.

The following table describes the effects of the CDS_BIND_TMP_DD variable values, which are case-insensitive. Setting the CDS_BIND_TMP_DD variable to a value other than those listed has the same effect as not setting the variable at all.

Value

Effect

 

 

both, cell, true, or

Allow the creation, in a TMP library, of both new cells and new

yes

views, even when the corresponding master data does not exist in

 

the master library.

view

Allows the creation, in a TMP library, of new views (only), even

 

when the corresponding master data does not exist in the master

 

library.

 

 

For example, you have a read-only working library called amslib. You want to assign that library to a TMP library and you want to be able to create new cells in the TMP library. In the cds.lib file for the library, you add anASSIGN statement so the file contains the following statements:

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DEFINE amslib ./AMS_lib/amsLib

ASSIGN amslib TMP /tmp/amslib_tmp

To permit the creation of new cells in the TMP library associated with the read-only amslib library, you set the environment variable on the command line.

setenv CDS_BIND_TMP_DD both

Then you use a command such as

ncvlog -ams -use5x -work amslib -view module compar6.vams

to compile the new compar6.vams module into the amslib TMP library.

Listing Compiled Modules

AMS Designer keeps a list of what has been compiled, which you can query with the UNIX command

ncls -library library_name

For example, assuming that you have a working library named amslib, the command

ncls -library amslib

might produce a list like the following.

ncls: 04.20-a001: (c) Copyright 1995-2002 Cadence Design Systems, Inc. module amslib.comparator:module (VST)

module amslib.comparator:module (SIG) <0x5d152f61> module amslib.comparator:module (SAM) <0x00000001> module amslib.comparator:module (SDB) architecture AMSLIB.DACONV:DACONV_BEHAV (AST)

architecture AMSLIB.DACONV:DACONV_BEHAV (SIG) <0x6210a27d> architecture AMSLIB.DACONV:DACONV_BEHAV (COD) <0x6210a27d> architecture AMSLIB.DACONV:DACONV_BEHAV (COD)

module amslib.elect_to_logic:module (VST)

module amslib.elect_to_logic:module (SIG) <0x3954d83b> module amslib.elect_to_logic:module (COD) <0x3954d83b> module amslib.elect_to_logic:module (SAM) <0x00000001> module amslib.elect_to_logic:module (SDB)

package AMSLIB.ELECTRICALSYSTEM (AST) package AMSLIB.ELECTRICALSYSTEM (COD) connect amslib.mixedsignal:connect (VST)

The first entry in this list, for example, says that in theamslib library, there is a cell called comparator, that has a view called module.

For more information on the ncls command, see the “ncls” section of the “Utilities” chapter, in the NC Verilog Simulator Help.

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