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Virtuoso AMS Environment User Guide

Netlisting

Netlisting Modes Supported by the AMS Netlister

The AMS netlister provides several ways to netlist cellviews:

Automatic netlisting, where an application-specific operation (such asCheck and Save in the Virtuoso Schematic Editor) triggers netlisting of the cellview being saved

Netlist updating and netlisting of entire designs using the Cadence hierarchy editor

Netlisting from the UNIX command line

Library netlisting, using a menu command in the CIW to netlist an entire library, all the views of a cell, or a single cellview

Netlisting of cells in response to changes in CDF

The following sections describe each of these methods in more detail and explain how to use them.

Automatic Netlisting of a Cellview

This method is perhaps the most likely to be used in day-to-day production work, because netlisting is transparent, occurring automatically whenever you save a CDBA view that has valid connectivity. When you use this method and specify that both netlisting and compiling take place automatically, you always have the information required so the next tool in the flow, AMS Design Prep or the AMS simulator, can run quickly.

To use this method,

1. Choose Tools – AMS – Options in the CIW to display the AMS Options window.

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2. Select Check and Save in the Categories field.

3.Select what you want the AMS netlister to do when you check and save a CDBA cellview.

You can choose to have the netlister check, netlist, and compile the cellview.

Note: If Generate AMS netlist is disabled, the AMS netlister removes any netlist previously created by the netlister for the cellview being checked and saved. This behavior continues even when the AMS tools are disabled. This process of removing existing netlists ensures that you do not inadvertently simulate an out-of-date netlist.

4.If necessary, select other choices in the Categories field and set the options that control the AMS netlister. For more information, see “Specifyingthe Behavior of the Netlister and Compilers” on page 74.

5.Click OK or Apply to save your settings.

At this point you are ready to work with the CDBA data. For example, you use Virtuoso Schematic Editor to create or edit schematic views, then use the Check and Save command. In response, the AMS netlister runs automatically, creating a Verilog-AMS netlist in the cellview directory of your saved schematic view. The newly created netlist is available

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to all users of the block: None of the users need to recreate the netlist unless the block changes.

Netlist Updating and Netlisting of Entire Designs

In this method, the AMS netlister runs under the control of AMS Design Prep. AMS Design

Prep is a Cadence hierarchy editor plug-in that operates on the design configuration. This is the easiest method to use when you are primarily interested in ensuring that all the cellviews used in a design have up-to-date netlists.

For guidance on using AMS Design Prep, see Chapter 10, “Preparing a Design for Simulation.”

Netlisting from the UNIX Command Line

This method allows you to netlist an entire library, all the views of a cell, or a single cellview without starting the graphical user interface. Instead you use the amsdirect command, which has the following syntax.

amsdirect_command ::=

amsdirect -LIb libName [ -Cell cellName ] [ -VIew viewName ] [ -VERIlog ] [ -Env envFileName ] [ -LOg logFileName ] [ -Incremental ] [ -Help ] [ -VERSion ]

The following table describes the amsdirect command options.

amsdirect Option

Effect

 

 

-LIb libName

Specifies the library containing the cellviews that you want to

 

translate from CDBA to Verilog-AMS netlists. If you do not specify

 

a cell with the -Cell option, the AMS netlister translates eligible

 

views for every cell in the library.

-Cell cellName

Specifies the cell containing the cellviews that you want to

 

translate from CDBA to Verilog-AMS netlists. If you do not specify

 

a view with the -VIew option, the AMS netlister translates each

 

view type listed on the amsEligibleViewTypes variable in the

 

ams.env file.

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amsdirect Option

Effect

 

 

-VIew viewName

Specifies the cellview name that you want to translate from CDBA

 

to a Verilog-AMS netlist. The type of the cellview must be one of:

 

schematic, symbolic, maskLayout, or netlist but the

 

name of the cellview can be any legal name. If you do not specify

 

a view name, the AMS netlister netlists each view type listed on

 

the amsEligibleViewTypes variable in the ams.env file.

-VERIlog

Tells the AMS netlister to produce Verilog-AMS netlists for the

 

processed CDBA cellviews. This option takes precedence over

 

the checkOnly and checkAndNetlist variables, whose

 

settings in the ams.env file otherwise determine the behavior. If

 

both variables are set to nil and you do not use the -VERIlog

 

option, the AMS netlister does nothing.

-Env envFileName

Tells the AMS netlister to read the ams.env variables in the

 

envFileName file and to use them to overlay the base set of

 

ams.env variables. For information about how the base set of

 

variables is determined, see “How AMS Designer Determines the

 

Set of Variables” on page 360.

 

Note: If envFileName is read while the base set is being

 

determined, the -Env option has no effect.

-LOg logFileName

Tells the AMS netlister to write messages to logFileName. The

 

-LOg option takes precedence over the logFileName variable

 

used in ams.env files.

 

If logFileName is an absolute path, the log file is written to

 

logFileName.

 

If logFileName is a relative path and

 

CDS_LOG_PATH is null, logFileName is placed in the

 

current directory.

 

CDS_LOG_PATH is non-null, the value of CDS_LOG_PATH

 

is prepended to logFileName.

 

For more information about specifying the log file, see

 

“logFileName” on page 421.

-Incremental

Tells the AMS netlister to netlist only new or revised cellviews.

-Help

Returns a brief description of the amsdirect command and its

 

options.

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