- •Contents
- •Preface
- •Related Documents
- •Typographic and Syntax Conventions
- •Creating HDL Modules for CDBA Cellviews
- •Creating HDL Data as You Save CDBA Cellviews
- •Creating HDL Data from Pre-existing CDBA Cellviews
- •Quick-Start Tutorial
- •The Circuit
- •AMS Designer Tools
- •Setting Up the Tutorial
- •Running from a Script
- •Running within the AMS Environment
- •Opening the Command Interpreter Window
- •Netlisting and Compiling
- •Elaborating and Simulating the Design
- •Summary
- •Setting Up the AMS Environment
- •Overview
- •The hdl.var File
- •The ams.env Files
- •AMS Designer Supports Design Management
- •Specifying the Text Editor to Use
- •Specifying Fonts for the Cadence Hierarchy Editor
- •Preparing to Use AMS Designer from the Hierarchy Editor
- •Netlisting
- •Netlisting Modes Supported by the AMS Netlister
- •Automatic Netlisting of a Cellview
- •Netlist Updating and Netlisting of Entire Designs
- •Netlisting from the UNIX Command Line
- •Library Netlisting
- •Netlisting of Cells in Response to Changes in CDF
- •Preparing Existing Analog Primitive Libraries for Netlisting
- •Specifying the Behavior of the Netlister and Compilers
- •Opening the AMS Options Windows
- •Setting Netlister Options from the Hierarchy Editor
- •Opening the CIW AMS Options Window
- •Setting Compiler Options
- •Viewing the AMS Netlister Log
- •Understanding the Output from the AMS Netlister
- •How Inherited Connections Are Netlisted
- •Inherited Signal Connections
- •Inherited Terminal Connections
- •Instance Values for Inherited Connections
- •Third-Party Tools and Other Cadence Tools
- •How Aliased Signals Are Netlisted
- •How m-factors (Multiplicity Factors) Are Netlisted
- •How Iterated Instances Are Netlisted
- •Passing Model Names as Parameters
- •Effect of the modelname, model, and modelName Parameters
- •Handling of the model* and componentName Parameters
- •Precedence of the model* and componentName Parameters
- •Specifying Parameters to be Excluded from Netlisting
- •Ignoring Parameters for Entire Libraries
- •Example: Specifying Parameters to Ignore
- •Ensuring that Floating Point Parameters Netlist Correctly
- •Working with Schematic Designs
- •Setting Schematic Rules Checker Options for AMS Designer
- •Creating Cellviews Using the AMS Environment
- •Preparing a Library
- •Creating the Symbol View
- •Using Blocks
- •Descend Edit
- •Inherited Connections
- •Global Signals in the Schematic Editor
- •Inherited Connections in a Hierarchy
- •How Net Expressions Evaluate
- •Net and Pin Properties
- •groundSensitivity and supplySensitivity Properties
- •Making Connect Modules Sensitive to Inherited Connection Values
- •Using External Text Designs
- •Overview of Steps for Using External Text Designs
- •Bringing Modules into a Cadence Library
- •Specifying the Working Library
- •Compiling into Libraries
- •Compiling into Temporary Libraries
- •Listing Compiled Modules
- •Using Text Blocks in Schematics
- •Using Modules Located in a Cadence Library
- •Preparing for Simulation
- •Using Analog Primitives
- •Using SPICE and Spectre Netlists and Subcircuits
- •Preparing to Use SPICE and Spectre Netlists and Subcircuits
- •Placing SPICE and Spectre Netlists and Subcircuits in a Schematic
- •Using Test Fixtures
- •Creating and Using a Textual Test Fixture
- •Creating a Textual Test Fixture
- •Using a Test Fixture
- •Example: Creating and Using a Test Fixture
- •Using Design Configurations
- •Ensuring HDL Design Unit Information Is Current
- •Preparing a Design for Simulation
- •Overview of AMS Design Prep
- •What AMS Design Prep Does to Prepare a Design for Simulation
- •When to Use AMS Design Prep
- •Specifying the Behavior of AMS Design Prep
- •Setting Options for Global Design Data
- •Specifying Global Signals
- •Specifying Design Variables
- •Specifying Model Files to Use During Elaboration
- •Running AMS Design Prep
- •The cds_globals Module
- •Global Signals
- •Design Variables
- •Setting Elaborator Options
- •Setting Simulator Options
- •Setting Waveform Selection Options
- •Creating Probes
- •Selecting Instances from the Virtuoso Schematic Editing Window
- •Selecting Buses
- •Selecting Instances from the Scope Navigator
- •Copying and Pasting Within Tables
- •Elaborating and Simulating
- •Viewing Messages
- •Plotting Waveforms After Simulation Ends
- •Starting the SimVision Waveform Viewer
- •Plotting Waveforms Selected on a Schematic (Direct Plot)
- •Using the amsdesigner Command
- •Examples
- •Producing Customized Netlists
- •Producing Customized Netlists
- •Identifying the Sections of a Netlist
- •Using ams.env Variables to Customize Netlists
- •Using Netlisting Procedures to Customize Netlists
- •Examples: Problems Addressed by Customized Netlists
- •Example: Adjusting Parameter Values to Account for Number of Fingers
- •Example: Using Symbols that Represent Verilog Test Code
- •Data Objects Supported for Netlisting
- •Netlister Object
- •Formatter Object
- •Cellview Object
- •Parameter Object
- •Instance Object
- •SKILL Functions Supported for Netlisting
- •Default Netlisting Procedures
- •Netlisting Helper Functions
- •Variables for ams.env Files
- •How AMS Designer Determines the Set of Variables
- •Why AMS Designer Uses ams.env Files, Not .cdsenv Files
- •List of ams.env Variables
- •Detailed Descriptions of ams.env Variables
- •aliasInstFormat
- •allowDeviantBuses
- •allowNameCollisions
- •allowSparseBuses
- •allowUndefParams
- •amsCompMode
- •amsDefinitionViews
- •amsEligibleViewTypes
- •amsExcludeParams
- •amsExpScalingFactor
- •amsLSB_MSB
- •amsMaxErrors
- •amsScalarInstances
- •amsVerbose
- •analogControlFile
- •bindCdsAliasLib
- •bindCdsAliasView
- •cdsGlobalsLib
- •cdsGlobalsView
- •checkAndNetlist
- •checkOnly
- •checktasks
- •compileAsAMS
- •compileExcludeLibs
- •compileMode
- •connectRulesCell
- •connectRulesCell2
- •connectRulesLib
- •connectRulesView
- •detailedDisciplineRes
- •discipline
- •excludeViewNames
- •hdlVarFile
- •headerText
- •ieee1364
- •ifdefLanguageExtensions
- •incdir
- •includeFiles
- •includeInstCdfParams
- •initFile
- •instClashFormat
- •iterInstExpFormat
- •language
- •lexpragma
- •logFileAction
- •logFileName
- •macro
- •maxErrors
- •messages
- •modifyParamScope
- •ncelabAccess
- •ncelabAnnoSimtime
- •ncelabArguments
- •ncelabCoverage
- •ncelabDelayMode
- •ncelabDelayType through ncelabMessages
- •ncelabMixEsc
- •ncelabModelFilePaths
- •ncelabNeverwarn through ncelabVipdelay
- •ncsimArguments
- •ncsimEpulseNoMsg through ncsimExtassertmsg
- •ncsimGUI
- •ncsimLoadvpi through ncsimStatus
- •ncsimTcl
- •ncsimUnbuffered through ncsimUseAddArgs
- •ncvhdlArguments
- •ncvlogArguments
- •ncvlogUseAddArgs
- •netClashFormat
- •netlistAfterCdfChange
- •netlistMode
- •netlistUDFAsMacro
- •neverwarn
- •noline
- •nomempack
- •nopragmawarn
- •nostdout
- •nowarn
- •paramDefVals
- •paramGlobalDefVal
- •pragma
- •processViewNames
- •prohibitCompile
- •runNcelab
- •runNcsim
- •scaddlglblopts
- •scaddltranopts
- •scale
- •scalem
- •scannotate
- •scapprox
- •scaudit
- •sccheckstmt
- •sccmin
- •sccompatible
- •scdebug
- •scdiagnose
- •scdigits
- •scerror
- •scerrpreset
- •scfastbreak
- •scgmin
- •scgmincheck
- •schomotopy
- •sciabstol
- •scic
- •scicstmt
- •scignshorts
- •scinfo
- •scinventory
- •sclimit
- •sclteratio
- •scmacromod
- •scmaxiters
- •scmaxnotes
- •scmaxrsd
- •scmaxstep
- •scmaxwarn
- •scmethod
- •scmodelevaltype
- •scmosvres
- •scnarrate
- •scnotation
- •scnote
- •scopptcheck
- •scpivabs
- •scpivotdc
- •scpivrel
- •scquantities
- •screadic
- •screadns
- •screlref
- •screltol
- •scrforce
- •scscale
- •scscalem
- •scscftimestamp
- •scscfusefileflag
- •scskipcount
- •scskipdc
- •scskipstart
- •scskipstop
- •scspeed
- •scstats
- •scstep
- •scstop
- •scstrobedelay
- •scstrobeperiod
- •sctemp
- •sctempeffects
- •sctitle
- •sctnom
- •sctopcheck
- •sctransave
- •scusemodeleval
- •scvabstol
- •scwarn
- •scwrite
- •simRunDirLoc
- •simVisScriptFile
- •status
- •templateFile
- •templateScript
- •timescale
- •update
- •use5xForVHDL
- •useDefparam
- •useNcelabNowarn
- •useNcelabSdfCmdFile
- •useNcsimNowarn
- •useNowarn
- •useScaddlglblopts
- •useScaddltranopts
- •useScic
- •useScreadic
- •useScreadns
- •useScwrite
- •useSimVisScriptFile
- •useProcessViewNamesOnly
- •verboseUpdate
- •vlogGroundSigs
- •vloglinedebug
- •vlogSupply0Sigs
- •vlogSupply1Sigs
- •wfDefaultDatabase
- •wfDefInstCSaveAll
- •wfDefInstCSaveLvl
- •wfDefInstSaveCurrents
- •wfDefInstSaveVoltages
- •wfDefInstVSaveAll
- •wfDefInstVSaveLvl
- •wfDefInstVSaveObjects
- •Updating Legacy SimInfo for Analog Primitives
- •The ams Fields
- •Special Handling of model, modelName, modelname, and componentName
- •Converting an Existing Analog Primitive Library
- •Designing for Virtuoso AMS Compliance
- •Terminals
- •Buses
- •Component Description Format
- •Parameters
- •Using Inherited Parameters
- •Using Cell Parameters
- •Parameterized Cells
- •VHDL-AMS Component Declarations
- •Properties
- •Properties to Avoid Completely
- •Avoid the portOrder Property Unless Required by Special Circumstances
- •Properties to Use Only in AMS Compatibility Mode
- •Properties That Have No Special Meaning in the AMS Environment
- •Properties Fully Supported by the AMS Environment
- •SKILL Functions
- •amsCheckCV
- •amsIsPresent
- •amsNetlist
- •amsProcessCellViews
- •amsUIOptionsForm
- •amsUIRunNetlisterForm
- •ddsCvtAMSTranslateCell
- •ddsCvtAMSTranslateLib
- •ddsCvtToolBoxAMS
- •vmsUpdateCellViews
- •Customization Variables
- •schHdlNotCreateDB
- •schHdlUseVamsForVerilog
- •vmsAnalysisType
- •vmsCreateMissingMasters
- •vmsNcvlogExecutable
- •vmsPortProcessing
- •vmsRunningInUI
- •vmsTemplateScript
- •vmsVerboseMsgLevel
- •Compiling Cadence-Provided Libraries
- •Purpose of the amsLibCompile Tool
- •Running the amsLibCompile Tool Manually
- •Example
Virtuoso AMS Environment User Guide
SKILL Functions and Customization Variables
SKILL Functions
The following table lists the public SKILL functions associated with the AMS environment.
See the cross-references for syntax, descriptions, and examples.
SKILL Function |
For information, see |
|
|
amsCheckCV |
amsCheckCV on page 617 |
amsIsPresent |
amsIsPresent on page 618 |
amsNetlist |
amsNetlist on page 619 |
amsProcessCellViews |
amsProcessCellViews on page 622 |
amsUIOptionsForm |
amsUIOptionsForm on page 625 |
amsUIRunNetlisterForm |
amsUIRunNetlisterForm on page 626 |
ddsCvtAMSTranslateCell |
ddsCvtAMSTranslateCell on page 627 |
ddsCvtAMSTranslateLib |
ddsCvtAMSTranslateLib on page 630 |
ddsCvtToolBoxAMS |
ddsCvtToolBoxAMS on page 632 |
vmsUpdateCellViews |
vmsUpdateCellViews on page 633 |
|
|
April 2004 |
616 |
Product Version 5.3 |
Virtuoso AMS Environment User Guide
SKILL Functions and Customization Variables
amsCheckCV
amsCheckCV( d_cvId g_genNetlist [ s_markerFuncSym ]
)
=> l_numCount
Description
Runs AMS checks on the given cellview. The exact nature of checks and severity of violations is set by AMS environment variables. This function checks the cellview only if the amsDirect.vlog checkOnly environment variable is set to t.
Arguments |
|
d_cvId |
The cellview to run AMS checks upon. |
g_genNetlist |
If t, specifies that a netlist is to be generated. |
s_markerFuncSym |
If not nil, attaches markers to database objects that violate AMS |
|
checks. The syntax of the marker function is |
|
markerFunc( d_id t_severity t_text) |
|
where d_id is the database ID of the offending object, |
|
t_severity is either "error" or "warning", and t_text |
|
is a string containing the text of the error. |
Value Returned |
|
l_numCount |
A list of two integers: the number of errors, and the number of |
|
warnings encountered while running AMS checks. |
Example
To run AMS checks and netlist a previously opened cellview, you might use
amsCheckCV( cv t )
The number of errors and warnings is returned as a list, and a verilog.vams netlist file is also generated for the cellview.
To run AMS checks on a previously opened cellview and enable the markers,
April 2004 |
617 |
Product Version 5.3 |
Virtuoso AMS Environment User Guide
SKILL Functions and Customization Variables
amsIsPresent
amsIsPresent()
=> t/nil
Description
Determines whether AMS netlisting capability is included as part of an executable.
Arguments
None.
Value Returned |
|
t |
AMS netlisting capability is included in the executable. |
nil |
AMS netlisting capability is not included in the executable. |
Example
You can test for the presence of the AMS netlisting capability like this:
if( isCallable( ’amsIsPresent ) then
;;Yes, AMS Netlisting capability is included
...
else
;;No, AMS Netlisting capability is not present
...
)
April 2004 |
618 |
Product Version 5.3 |
Virtuoso AMS Environment User Guide
SKILL Functions and Customization Variables
amsNetlist
amsNetlist( t_libName [t_cellName] [t_viewName] [ ?checkOnly g_checkOnly ]
[ ?netlist g_netlist ]
[ ?netlistMode s_netlistMode ] [ ?compile g_compile ] )
=> t/nil
Description
Runs the AMS netlister on the specified cellviews and, depending upon the passed arguments, performs one or more of the following operations: 1) checks cellviews; 2) checks and netlists cellviews; 3) checks, netlists and compiles cellviews; 4) compiles cellviews.
To generate a netlist, the amsNetlist function calls the following netlist procedures, in the order given.
1.amsPrintComments
2.amsPrintHeaders
3.amsPrintModule
4.amsPrintFooters
You cannot override the amsNetlist function, so you cannot change the order in which the procedures are called. You can, however, override the individual procedures.
Arguments |
|
t_libName |
A string, which is the name of the library to process. |
t_cellName |
A string, which is the name of the cell to process. If |
|
t_cellName is left blank (with just ""), all the cells in the |
|
library are processed. |
t_viewName |
A string, which is the name of the view to process. If |
|
t_viewName is left blank (with just ""), all the views are |
|
processed. |
g_checkOnly |
The value t or nil. If t is specified, the checks run. Ifnil is |
|
specified, the checks do not run. If no value is specified, the |
|
value defaults to that of the amsDirect.vlog checkOnly |
April 2004 |
619 |
Product Version 5.3 |
|
Virtuoso AMS Environment User Guide |
|
|
SKILL Functions and Customization Variables |
|
|
|
|
|
environment variable. For additional information, see |
|
|
“checkOnly” on page 394. |
|
g_netlist |
The value t or nil. If t is specified, a Verilog-AMS netlist is |
|
|
generated. If g_netlist is nil, no netlist is generated. If no |
|
|
value is specified, the value defaults to that of the |
|
|
amsDirect.vlog checkAndNetlist environment variable. |
|
|
For additional information, see “checkAndNetlist” on page 393. |
|
s_netlistMode |
A symbol with the value ‘incr or ‘all. If ‘incr is specified, |
|
|
only new or revised cellviews are netlisted. For example, |
|
|
changing a symbol or the CDF for a device in a schematic and |
|
|
then requesting netlisting triggers netlisting for only affected cells |
|
|
When ‘all is specified and netlisting is requested, every cell is |
|
|
netlisted. This is the default value. |
|
g_compile |
The value t or nil. If t is specified, the generated Verilog-AMS |
|
|
netlist is compiled. If g_compile is nil, the netlist is not |
|
|
compiled. |
|
|
If no value is specified, the default value depends on the value of |
|
|
the amsDirect.vlog prohibitCompile environment |
|
|
variable. When the value of the prohibitCompile variable is |
|
|
t, the default value for g_compile is nil. When the value of |
|
|
the prohibitCompile variable is nil, the default value for |
|
|
g_compile is t. |
|
Value Returned |
|
|
t |
The function was successful. |
|
nil |
The function failed. |
|
Example
To netlist and compile mylib.mycell:schematic:
amsNetlist( "mylib" "mycell" "schematic" ?netlist t ?compile t)
To netlist and compile all eligible views of mycell:
amsNetlist( "mylib" "mycell" "" ?netlist t ?compile t)
April 2004 |
620 |
Product Version 5.3 |
Virtuoso AMS Environment User Guide
SKILL Functions and Customization Variables
To compile all the cellviews in mylib:
amsNetlist( "mylib" "" "" ?compileAll t)
April 2004 |
621 |
Product Version 5.3 |