Here the monitor instance amonitor will keep track of the dynamic quantity id in the mosfet instance mn. If the value of id goes above the specified threshold of 4.0e-3 amps then instance amonitor will generate the error message and stop the simulation.

9.17 Analog kernel control system tasks and functions

Verilog AMS HDL adds a set of tasks and functions to control the analog solver’s behavior on a signals and instances called the analog kernel control tasks.

9.17.1 $discontinuity

The $discontinuity task is used to give hints to the simulator about the behavior of the module so the simulator can control its simulation algorithms to get accurate results in exceptional situations. This task does not directly specify the behavior of the module. $discontinuity shall be executed whenever the analog behavior changes discontinuously.

The general form is

$discontinuity [ ( constant_expression ) ];

where constant_expression indicates the degree of the discontinuity if the argumnet to $discontinuity is non-negative, i.e. $discontinuity(i) implies a discontinuity in the i’th derivative of the constitutive equation with respect to either a signal value or time where i must be a non-negative integer. Hence, $discontinuity(0) indicates a discontinuity in the equation, $discontinuity(1) indicates a discontinuity in its slope, etc. A special form of the $discontinuity task, $discontinuity(-1), is used with the $limit() function so -1 is also a valid argument of $discontinuity. See 9.17.3 for an explanation.

Because discontinuous behavior can cause convergence problems, discontinuity shall be avoided whenever possible.

The filter functions (transition(), slew(), laplace(), etc.) can be used to smooth discontinuous behavior. However, in some cases it is not possible to implement the desired functionality using these filters. In those cases, the $discontinuity task shall be executed when the signal behavior changes abruptly.

Discontinuity created by switch branches and filters, such as transition() and slew(), does not need to be announced.

The following example uses the discontinuity task to model a relay.

module relay (c1, c2, pin, nin) ; inout c1, c2 ;

input pin, nin ;

electrical c1, c2, pin, nin ; parameter real r=1 ;

analog begin

@(cross(V(pin,nin))) $discontinuity ;

if (V(pin,nin) >= 0) I(c1,c2) <+ V(c1,c2)/r;

else

I(c1,c2) <+ 0 ;

end endmodule

In this example, cross() controls the time step so the time when the relay changes position is accurately resolved. It also triggers the $discontinuity task, which causes the simulator to react properly to the discontinuity. This would have been handled automatically if the type of the branch (c1,c2) had been switched between voltage and current.

Another example is a source which generates a triangular wave. In this case, neither the model nor the waveforms generated by the model are discontinuous. Rather, the waveform generated is piecewise linear with discontinuous slope. If the simulator is aware of the abrupt change in slope, it can adapt to eliminate problems resulting from the discontinuous slope (typically changing to a first order integration method).

module triangle(out); output out; voltage out;

parameter real period = 10.0, amplitude = 1.0; integer slope;

real offset;

analog begin

@(timer(0, period)) begin slope = +1;

offset = $abstime ; $discontinuity;

end

@(timer(period/2, period)) begin slope = -1 ;

offset = $abstime; $discontinuity ;

end

V(out) <+ amplitude*slope* (4*($abstime - offset)/period - 1);

end endmodule

9.17.2 $bound_step task

The $bound_step() task puts a bound on the next time step. It does not specify exactly what the next time step is, but it bounds how far the next time point can be from the present time point. The task takes the maximum time step as an argument. It does not return a value.

The general form is

$bound_step ( expression ) ;

where expression is a required argument and represents the maximum timestep the simulator can advance.

The example below implements a sinusoidal voltage source and uses the $bound_step() task to assure the simulator faithfully follows the output signal (it is forcing 20 points per cycle).

module vsine(out); output out; voltage out;

parameter real freq=1.0, ampl=1.0, offset=0.0;

analog begin

V(out) <+ ampl*sin(2.0*‘M_PI*freq*$abstime) + offset; $bound_step(0.05/freq);

end endmodule

9.17.3 $limit

Other nonlinearities besides the exponential are present in semiconductor device compact models. The $limit() function provides a method to indicate these nonlinearities to the simulator and, if necessary, recommend a function to use to limit the change of its output from iteration to iteration. Syntax 9-12 shows the methods of using the $limit() function.

limit_call ::=

$limit ( access_function_reference )

| $limit ( access_function_reference , string, arg_list )

| $limit ( access_function_reference , analog_function_identifier , arg_list )

Syntax 9-12—Syntax for $limit()

When the simulator has converged, the return value of the $limit() function is the value of the access function reference, within appropriate tolerances. For some analysis types or solution methods, such as damped Newton-Raphson, the return value of the $limit() function may depend on the value of the access function and internal state of the function. In all cases, the simulator is responsible for determining if limiting should be applied and what the return value is on a given iteration.

When more than one argument is supplied to the $limit() function, the second argument recommends a function to use to compute the return value. When the second argument is a string, it refers to a built-in function of the simulator. The two most common such functions are pnjlim and fetlim, which are found in SPICE and many SPICE-like simulators. Simulators may support other built-in functions and need not support pnjlim or fetlim. If the string refers to an unknown or unsupported function, the simulator is responsible for determining the appropriate limiting algorithm, just as if no string had been supplied.

pnjlim is intended for limiting arguments to exponentials, and the limexp() function of 4.5.13 may be implemented through a function derived from pnjlim. Two additional arguments to the $limit() function are required when the second argument to the limit function is the string “pnjlim”: the third argument to $limit() indicates a step size vte and the fourth argument is a critical voltage vcrit. The step size vte is usually the product of the thermal voltage $vt and the emission coefficient of the junction. The critical

voltage is generally obtained from the formula Vcrit = vte ln(vte ⁄ (2 Is)) , where Is is the saturation current of the junction.

fetlim is intended for limiting the potential across the oxide of a MOS transistor. One additional argument to the $limit() function is required when the second argument to the limit function is the string "fetlim": the third argument to $limit() is generally the threshold voltage of the MOS transistor.

In the case that none of the built-in functions of the simulator is appropriate for limiting the potential (or flow) used in a nonlinear equation, the second argument of the $limit() function may be an identifier

referring to a user-defined analog function. User-defined functions are described in 4.7. In this case, if the simulator determines that limiting is needed to improve convergence, it will pass the following quantities as arguments to the user-defined function:

—The first argument of the user-defined function shall be the value of the access function reference for the current iteration.

—The second argument shall be the appropriate internal state; generally, this is the value that was returned by the $limit() function on the previous iteration.

—If more than two arguments are given to the $limit() function, then the third and subsequent arguments are passed as the third and subsequent arguments of the user-defined function.

The arguments of the user-defined function shall all be declared input.

In order to prevent convergence when the output of the $limit() function is not sufficiently close to the value of the access function reference, the user-defined function shall call $discontinuity(-1) (see 9.17) when its return value is not sufficiently close to the value of its first argument.

The module below defines a diode and includes an analog function that mimics the behavior of pnjlim in SPICE. Though limexp() could have been used for the exponential in the current, using $limit() allows the same voltage to be used in the charge calculation.

module diode(a,c); inout a, c; electrical a, c;

parameter real IS = 1.0e-14; parameter real CJO = 0.0;

analog function real spicepnjlim; input vnew, vold, vt, vcrit;

real vnew, vold, vt, vcrit, vlimit, arg; begin

vlimit=vnew;

if ((vnew > vcrit) && (abs(vnew-vold) > (vt+vt))) begin if (vold > 0) begin

arg = 1 + (vnew-vold) / vt; if (arg > 0)

vlimit = vold + vt * ln(arg); else

vlimit = vcrit; end else

vlimit = vt * ln(vnew/vt); $discontinuity(-1);

end

spicepnjlim = vlimit; end

endfunction

real vdio, idio, qdio, vcrit; analog begin

vcrit=0.7;

vdio = $limit(V(a,c), spicepnjlim, $vt, vcrit); idio = IS * (exp(vdio/$vt) - 1);

I(a,c) <+ idio;

if (vdio < 0.5) begin

qdio = 0.5 * CJO * (1-sqrt(1-V(a,c))); end else begin

qdio = CJO* (2.0*(1.0-sqrt(0.5))

+ sqrt(2.0)/2.0*(vdio*vdio+vdio-3.0/4.0));

end