Annex C

(normative)

Analog language subset

This annex defines a working subset of Verilog-AMS HDL for analog-only products.

C.1 Verilog-AMS introduction

This section previews Verilog-A and its language features.

C.1.1 Verilog-A overview

This Verilog-A subset defines a behavioral language for analog only systems. Verilog-A is derived from the IEEE std 1364-2005 Verilog HDL specification using a minimum number of constructs for analog and mixed-signal behavioral descriptions. This Annex is intended to cover the definition and semantics of Ver- ilog-A.

The intent of Verilog-A is to let designers of analog systems and integrated circuits create and use modules which encapsulate high-level behavioral descriptions of systems and components. The behavior of each module can be described mathematically in terms of its terminals and external parameters applied to the module. These behavioral descriptions can be used in many disciplines such as electrical, mechanical, fluid dynamics, and thermodynamics.

Verilog-A has been defined to be applicable to both electrical and non-electrical systems description. It supports conservative and signal-flow descriptions by using the terminology for these descriptions using the concepts of nodes, branches, and terminals. The solution of analog behaviors which obey the laws of conservation fall within the generalized form of Kirchhoff’s Potential and Flow Laws (KPL and KFL). Both of these are defined in terms of the quantities associated with the analog behaviors.

C.1.2 Verilog-A language features

The Verilog-A subset provides access to a salient set of features of the full modeling language that allow analog designers the ability to model analog systems:

—Verilog-A modules are compatible with Verilog-AMS HDL.

—Analog behavioral modeling descriptions are contained in separate analog blocks.

—Branches can be named for easy selection and access.

—Parameters can be specified with valid range limits.

—Systems can be modeled by using expressions consisting of operators, variables, and signals:

—a full set of operators including trigonometric functions, integrals, and derivatives;

—a set of waveform filters to modify the waveform results for faster and more accurate simulation like transition, slew, Laplace, and Z-domain;

—a set of events to control when certain code is simulated;

—selection of the simulation time step for simulation control;

—support for accessing SPICE primitives from within the language.