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Accellera

Analog and Mixed-signal Extensions to Verilog HDL

Version 2.3.1, June 1, 2009

endmodule

Unfortunately, if the module matchedres is itself instantiated off-center, then the process gradients will not be canceled.

6.4 Paramsets

A paramset definition is enclosed between the keywords paramset and endparamset, as shown in Syntax 6-4. The first identifier following the keyword paramset is the name of the paramset being defined. The second identifier will usually be the name of a module with which the paramset is associated. The second identifier may instead be the name of a second paramset. A chain of paramsets may be defined in this way, but the last paramset in the chain shall reference a module.

paramset_declaration ::=

// from A.1.9

{ attribute_instance } paramset paramset_identifier module_or_paramset_identifier ;

 

paramset_item_declaration { paramset_item_declaration }

 

paramset_statement { paramset_statement }

 

endparamset

 

paramset_item_declaration ::=

{ attribute_instance } parameter_declaration ;

| { attribute_instance } local_parameter_declaration ; | aliasparam_declaration

| { attribute_instance } integer_declaration | { attribute_instance } real_declaration

paramset_statement ::=

.module_parameter_identifier = paramset_constant_expression ; | .system_parameter_identifier = paramset_constant_expression ; | analog_function_statement

paramset_constant_expression ::= constant_primary

| hierarchical_parameter_identifier

| unary_operator { attribute_instance } constant_primary

| paramset_constant_expression binary_operator { attribute_instance } paramset_constant_expression | paramset_constant_expression ? { attribute_instance } paramset_constant_expression : paramset_constant_expression

Syntax 6-4—Syntax for paramset

The paramset itself contains no behavioral code; all of the behavior is determined by the associated module. The restrictions on statements in the paramset are described in 6.4.1.

The paramset provides a convenient way to collect parameter values for a particular module, such that an instance need only provide overrides for a smaller number of parameters. A simulator can use this information to optimize data storage for the instances: multiple instances may share a paramset, and the simulator can share storage of parameters of the underlying module. The shared storage of paramsets makes them similar to the SPICE model card. Also like the SPICE model card, paramsets may be overloaded, as described in 6.4.2.

The only restriction on the associated module for a paramset is that it does not contain a defparam statement in or under its hierarchy, see 6.3.1.

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Version 2.3.1, June 1, 2009

VERILOG-AMS

A paramset can have a description attribute, which shall be used by the simulator when generating help messages for the paramset.

The following example shows how one might convert a SPICE model card into a Verilog-AMS paramset. Suppose one has the following lines in a SPICE netlist:

m1

d1

g 0

0

nch

l=1u

w=10u

m2

d2

g 0

0

nch

l=1u

w=5u

.model nch nmos

(level=3 kp=5e-5 tox=3e-8 u0=650 nsub=1.3e17

 

 

 

 

 

+ vmax=0 tpg=1 nfs=0.8e12)

These lines could be written in Verilog-AMS as follows, assuming that nmos3 is a behavioral module that contains the same equations as the SPICE primitive.

nch #(.l(1u), .w(10u)) m1 (.d(d1), .g(g), .s(0), .b(0)); nch #(.l(1u), .w(5u)) m2 (.d(d2), .g(g), .s(0), .b(0));

paramset nch nmos3; // default paramset parameter real l=1u from [0.25u:inf); parameter real w=1u from [0.2u:inf);

.l=l; .w=w; .ad=w*0.5u; .as=w*0.5u;

.kp=5e-5; .tox=3e-8; .u0=650; .nsub=1.3e17;

.vmax=0; .tpg=1; .nfs=0.8e12; endparamset

Note that the paramset has only two parameters, l and w; an instance of the paramset that attempts to override any of the other parameters of the underlying module nmos3 would generate an error. Analog simulators are expected to optimize the storage of paramset values in a manner similar to the way SPICE optimizes model parameter storage.

6.4.1 Paramset statements

The restrictions on statements or assignments allowed in a paramset are similar to the restrictions for analog functions. Specifically, a paramset:

can use any statements available for conditional execution (see 5.2);

shall not use access functions;

shall not use contribution statements or event control statements; and

shall not use named blocks.

The special syntax

.module_parameter_identifier = paramset_constant_expression ;

is used to assign values to the parameters of the associated module. The expression on the right-hand side can be composed of numbers, parameters and hierarchical out-of-module references to local parameters of a different module. Hierarchical out-of-module references to non-local parameters of a different module is disallowed. The expression may also use the $arandom function from 9.13.1 and the $rdist_ functions from 9.13.2, so long as the arguments to these functions are constant.

Paramset statements may assign values to variables declared in the paramset; the values need not be constant expressions. However, these variables shall not be used to assign values to the module’s parameters. Paramset variables may be used to provide output variables for instances that use the paramset; see 6.4.3.

Copyright © 2009 Accellera Organization, Inc.

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Accellera

Analog and Mixed-signal Extensions to Verilog HDL

Version 2.3.1, June 1, 2009

The following example shows how to use the $rdist_normal function of 9.13.2 to model two kinds of statistical variation.

module semicoCMOS (); localparam real tox = 3e-8;

localparam real dtox_g = $rdist_normal(1,0,1n,"global"); localparam real dtox_mm = $rdist_normal(2,0,5n,"instance");

endmodule

paramset nch nmos3; // mismatch paramset parameter real l=1u from [0.25u:inf); parameter real w=1u from [0.2u:inf); parameter integer mm=0 from (0:1];

.l=l; .w=w; .ad=w*0.5u; .as=w*0.5u;

.kp=5e-5; .u0=650; .nsub=1.3e17;

.vmax=0; .tpg=1; .nfs=0.8e12;

.tox = semicoCMOS.tox + semicoCMOS.dtox_g + semicoCMOS.dtox_mm; endparamset

module top ();

electrical d1, d2, g, vdd, gnd; ground gnd;

nch #(.l(1u), .w(5u), .mm(1)) m1(.d(d1), .g(g), .s(gnd), .b(gnd)); nch #(.l(1u), .w(5u), .mm(1)) m2(.d(d2), .g(g), .s(gnd), .b(gnd)); resistor #(.r(1k)) R1 (vdd, d1);

resistor #(.r(1k)) R2 (vdd, d2); vsine #(.dc(2.5)) Vdd (vdd, gnd);

vsine #(.dc(0), .ampl(1.0), .offset(1.5), .freq(1k)) Vg (g, gnd); endmodule

Because the local parameter dtox_mm is obtained from $rdist_normal with the string "instance", the instances m1 and m2 will get different values of tox. Though the local variation has a smaller standard deviation than the global variation, only the local variation will affect the differential voltage between nodes d1 and d2.

6.4.2 Paramset overloading

Paramset identifiers need not be unique: multiple paramsets can be declared using the same paramset_identifier, and they may refer to different modules. During elaboration, the simulator shall choose an appropriate paramset from the set that shares a given name for every instance that references that name.

When choosing an appropriate paramset, the following rules shall be enforced:

All parameters overridden on the instance shall be parameters of the paramset

The parameters of the paramset, with overrides and defaults, shall be all within the allowed ranges specified in the paramset parameter declaration.

The local parameters of the paramset, computed from parameters, shall be within the allowed ranges specified in the paramset.

The underlying module shall have a port declared for each port connected in the instance line.

The rules above may not be sufficient for the simulator to pick a unique paramset, in which case the following rules shall be applied in order until a unique paramset has been selected:

The paramset with the fewest number of un-overridden parameters shall be selected.

The paramset with the greatest number of local parameters with specified ranges shall be selected.

The paramset with the fewest ports not connected in the instance line shall be selected.

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Version 2.3.1, June 1, 2009

VERILOG-AMS

It shall be an error if there are still more than one applicable paramset for an instance after application of these rules.

If a paramset assigns a value to a module parameter and this value is outside the range specified for that module parameter, it shall be an error. The simulator shall consider only the ranges of the paramset’s own parameters when choosing a paramset.

The following example illustrates some of the rules for paramset selection. Consider a design that includes the two paramsets defined previously (in the examples of 6.4 and 6.4.1) as well as the following paramsets:

paramset nch nmos3; // short-channel paramset parameter real l=0.25u from [0.25u:1u); parameter real w=1u from [0.2u:inf); parameter real ad=0.5*w from (0:inf); parameter real as=0.5*w from (0:inf);

.l=l; .w=w; .ad=ad; .as=as;

.kp=5e-5; .tox=3e-8; .u0=650; .nsub=1.3e17;

.vmax=0; .tpg=1; .nfs=0.8e12; endparamset

paramset nch nmos3; // long-channel paramset parameter real l=1u from [1u:inf); parameter real w=1u from [0.2u:inf); parameter real ad=0.4*w from (0:inf); parameter real as=0.4*w from (0:inf);

.l=l; .w=w; .ad=ad; .as=as;

.kp=5e-5; .tox=3e-8; .u0=640; .nsub=1.3e17;

.vmax=0; .tpg=1; .nfs=0.7e12; endparamset

The following instances might exist in the design:

nch #(.l(1u), .w(5u), .mm(1)) m1(.d(d1), .g(g), .s(0), .b(0)); nch #(.l(1u), .w(5u), .mm(1)) m2(.d(d2), .g(g), .s(0), .b(0)); nch #(.l(1u), .w(10u)) m3 (.d(g), .g(g), .s(0), .b(0));

nch #(.l(3u), .w(5u), .ad(1.2p), .as(1.3p)) m4 (.d(d1), .g(g2), .s(d2), .b(0));

The instances m1 and m2 will use the mismatch paramset from 6.4.1, because it is the only one for which mm is a parameter. The instance m4 will use the long-channel paramset defined in this example, because while the short-channel paramset also has ad and as as parameters, the length of m4 is only allowed by the range for l in the long-channel paramset. The instance m3 will use the default paramset defined in 6.4; it cannot use the mismatch paramset because the default value of mm for that paramset is not allowed by the range, and it discriminates against the long-channel paramset because that paramset would have two un-overridden parameters.

6.4.3 Paramset output variables

As with modules, integer or real variables in the paramset that are declared with descriptions are considered output variables; see 3.2.1. A few special rules apply to paramset output variables and output variables of modules referenced by a paramset:

If a paramset output variable has the same name as an output variable of the module, the value of the paramset output variable is the value reported for any instance that uses the paramset.

If a paramset variable without a description has the same name as an output variable of the module, the module output variable of that name shall not be available for instances that use the paramset.

Copyright © 2009 Accellera Organization, Inc.

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