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Accellera

 

Version 2.3.1, June 1, 2009

VERILOG-AMS

for generate blocks in a conditional generate construct. See 6.6.3 for a discussion of naming conditional generate blocks.

If an identifier is referenced directly (without a hierarchical path) within a named block, or generate block it shall be declared either within the named block, or generate block locally or within a module, or within a named block, or generate block that is higher in the same branch of the name tree containing the named block, or generate block. If it is declared locally, the local item shall be used; if not, the search shall continue upward until an item by that name is found or until a module boundary is encountered. If the item is a variable, it shall stop at a module boundary; if the item is a named block, or generate block, it continues to search higher level modules until found.

Because of the upward searching process, path names which are not strictly on a downward path can be used.

6.9 Elaboration

Elaboration is the process that occurs between parsing and simulation. It binds modules to module instances, builds the model hierarchy, computes parameter values, selects paramsets, resolves hierarchical names, establishes net connectivity, resolves disciplines and inserts connect modules, and prepares all of this for simulation. With the addition of generate constructs, the order in which these tasks occur becomes significant.

6.9.1 Concatenation of analog blocks

A module definition may have multiple analog blocks. The simulator shall internally combine the multiple analog blocks into a single analog block in the order that the analog blocks appear in the module description. In other words, the analog blocks shall execute in the order that they are specified in the module.

Concatenation of the analog blocks occurs after all generate constructs have been evaluated, i.e. after the loop generate constructs have been unrolled, and after the conditional generate constructs have been selected. If an analog block appears in a loop generate statement, then the order in which the loop is unrolled during elaboration determines the order in which the analog blocks are concatenated to the eventual single analog block after elaboration.

6.9.2 Elaboration and paramsets

If a generate construct contains an instantiation of an overloaded paramset, then the paramset selection is performed after the generate construct has been evaluated. The evaluation of the generate construct may influence the values and connections of the paramset instance, and hence the selection of matching paramset and module.

6.9.3 Elaboration and connectmodules

Automatic insertion of connect modules is a post-elaboration operation, as first the disciplines of the various nets needs to be resolved. This is described in detail in 7.8.

Discipline resolution can only occur after elaboration of the generate constructs once the connections of all nets has been resolved. It should also occur after the paramset selection as the choice for a particular module instantiation may affect the disciplines of the connected nets.

Copyright © 2009 Accellera Organization, Inc.

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Accellera

Analog and Mixed-signal Extensions to Verilog HDL

Version 2.3.1, June 1, 2009

6.9.4 Order of elaboration

Because of generate constructs and paramsets, the model hierarchy can depend on parameter values. Because defparam statements can alter parameter values from almost anywhere in the hierarchy, the result of elaboration can be ambiguous when generate constructs are involved. The final model hierarchy can depend on the order in which defparams and generate constructs are evaluated.

The use of paramsets cannot introduce ambiguity as no defparam inside the hierarchy below a paramset instantiation is allowed, see 6.3.1 and 6.4.

The following algorithm defines an order that produces the correct hierarchy:

1)A list of starting points is initialized with the list of top-level modules.

2)The hierarchy below each starting point is expanded as much as possible without elaborating generate constructs. All parameters encountered during this expansion are given their final values by applying initial values, parameter overrides, defparam statements, and paramset selections.

3)In other words, any defparam statement whose target can be resolved within the hierarchy elaborated so far must have its target resolved and its value applied. defparam statements whose target cannot be resolved are deferred until the next iteration of this step. Because no defparam inside the hierarchy below a generate construct is allowed to refer to a parameter outside the generate construct, it is possible for parameters to get their final values before going to step 3).

4)Each generate construct encountered in step 2) is revisited, and the generate scheme is evaluated. The resulting generate block instantiations make up the new list of starting points. If the new list of starting points is not empty, go to step 2).

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