If no attribute exists on the instance of an analog primitive, then the discipline may be determined by the disciplines of other instances connected to the same net segment. The disciplines of the vpiLoConn of all other instances on the net segment shall be evaluated to determine if they are of domain continuous and compatible with each other. If they are, then the discipline of the analog primitive shall be set to the same discipline. If they are not compatible, then an error will occur as defined in 3.11. If there are no continuous disciplines defined on the net segment, then the discipline shall default to electrical.

E.4.3 Name scoping of SPICE primitives

In the resolution hierarchy of names during elaboration a module or paramset defined in the Verilog-AMS will always be selected in favor of a SPICE primitive, model, or subcircuit using exactly the same name.

In case of a name match with differences in case, the module or paramset does not interfere with the SPICE primitive, model, or subcircuit, but the resolution method described in E.2.1 shall apply.

In case of a SPICE primitive which is always available in the Verilog-AMS simulator, a Verilog-AMS module or paramset whose name exactly matches that of the primitive will be used in module instantiations. The Verilog-AMS simulator may issue a warning stating that the Verilog-AMS module or paramset is used instead of the SPICE primitive. In case of a Verilog-AMS module or paramset whose name exactly matches that of a SPICE model or subcircuit, the Verilog-AMS simulator shall issue an warning message stating that the Verilog-AMS module or paramset is used instead of the SPICE model or subcircuit.

E.4.4 Limiting algorithms

Many SPICE simulators use limiting algorithms to improve convergence in Newton-Raphson iterations. Table E.2 lists the preferred names for three functions that may be available in a simulator, their arguments, and their intended uses. The function name, enclosed in quotation marks, can be used in the $limit() function of 9.17.3. This allows a Verilog-AMS module to use the same limiting algorithms available to built-in SPICE primitives. The arguments are described in 9.17.3.

Table E.2—SPICE limiting functions

E.5 Other issues

This section highlights some other issues

E.5.1 Multiplicity factor on subcircuits

Some SPICE simulators support a multiplicity factor (M) parameter on subcircuits without the parameter being explicitly being declared. This factor is typically used to indicate the subcircuit should be modeled as if there are a specified number of copies in parallel. In previous versions of Verilog-AMS HDL, subcircuits defined as modules could not support automatic M factors.

Starting with LRM Version 2.2, the multiplicity factor is supported for subcircuits defined as modules in Verilog-AMS using the hierarchical system parameter $mfactor, as described in 6.3.6.

E.5.2 Binning and libraries

Some SPICE netlists provide mechanisms for mapping an instance to a group of models, with the final determination of which model to use being based on rules encapsulated in the SPICE netlist. Examples include model binning or corners support. From within an instance statement, it appears as if the instance is referencing a simple SPICE model; supporting these additional capabilities in Verilog-AMS HDL is supported via the instance line by default. Support of SPICE model cards is implementation specific (including those using these mechanisms).

Similar functionality for Verilog-AMS is supported through use of the paramset, as described in 6.4. Instead of referencing a specific module, and instance may refer to a paramset identifier, and there may be several paramsets with the same identifier (name). The final determination of which paramset to use is made according to rules specified in 6.4.2.