Добавил:
Upload Опубликованный материал нарушает ваши авторские права? Сообщите нам.
Вуз: Предмет: Файл:
VAMS-LRM-2-3-1.pdf
Скачиваний:
43
Добавлен:
05.06.2015
Размер:
3.73 Mб
Скачать

Accellera

 

Version 2.3.1, June 1, 2009

VERILOG-AMS

ddiscrete [10:1] connector1;

Nets represent the abstraction of information about signals. As with ports, nets represent component interconnections. Nets declared in the module interface define the ports to the module (see 6.5.4).

A net used for modeling a conservative system shall have a discipline with both access functions (potential and flow) defined. When modeling a signal-flow system, the discipline of a net can have only potential access functions. When modeling a discrete system, the discipline of a net can only have a domain of discrete defined.

Nets declared with an empty discipline do not have declared natures, so such nets can not be used in analog behavioral descriptions (because the access functions are not known). However, such nets can be used in structural descriptions, where they inherit the natures from the ports of the instances of modules that connect to them.

3.6.3.1 Net descriptions

Nets can be declared with a description attribute. This information can be used by the simulator to generate help messages for a module.

Example:

(* desc="drain terminal" *) electrical d;

If a net is also a module port, the description attribute may also be specified on the port declaration line (in which the net is declared as input, inout, or output). If the description attribute is specified for the same net_identifier in both the net discipline declaration and the port declaration, then the last attribute value shall be used and the tool can give a warning that a duplicate attribute specification has occurred.

3.6.3.2 Net Discipline Initial (Nodeset) Values

Nets with continuous disciplines are allowed to have initializers on their net discipline declarations; however, nets of non-continuous disciplines are not.

electrical a = 5.0;

electrical [0:4] bus = ’{2.3,4.5,,6.0}; mechanical top.foo.w = 250.0;

The initializer shall be a constant_expression and will be used as a nodeset value for the potential of the net by the analog solver. In the case of analog buses, a constant array expression is used as an initializer. A null value in the constant array indicates that no nodeset value is being specified for this element of the bus.

If different nets of a node have conflicting initializers, then initializers on hierarchical net declarations win. If there are multiple hierarchical declarations, then the declaration on the highest level wins. If there are multiple hierarchical declarations on the highest level, then it is a race condition for which the initializer wins. If the multiple conflicting initializers are not hierarchical, then it is also a race condition for which the initializer wins.

3.6.4 Ground declaration

Each ground declaration is associated with an already declared net of continuous discipline. The node associated with the net will be the global reference node in the circuit. The net must be assigned a continuous discipline to be declared ground.

Copyright © 2009 Accellera Organization, Inc.

40

Соседние файлы в предмете [НЕСОРТИРОВАННОЕ]