—The system functions shall always return the same value given the same seed. This facilitates debugging by making the operation of the system repeatable. In order to get different random values when the seed argument is a parameter, the user can override the parameter.

—All functions return a real value.

—In $rdist_uniform, the start and end arguments are real inputs which bound the values returned. The start value shall be smaller than the end value.

—The mean argument used by $rdist_normal, $rdist_exponential, $rdist_poisson, and $rdist_erlang is an real input which causes the average value returned by the function to approach the value specified.

—The standard_deviation argument used by $rdist_normal is a real input, which helps determine the shape of the density function. Using larger numbers for standard_deviation spreads the returned values over a wider range. Using a mean of zero (0) and a standard_deviation of one (1), $rdist_normal generates Gaussian distribution.

—The degree_of_freedom argument used by $rdist_chi_square and $rdist_t is a real input, which helps determine the shape of the density function. Using larger numbers for degree_of_freedom spreads the returned values over a wider range.

—The type_string provides support for Monte-Carlo analysis. If the type_string is “global,” then one value is generated for each Monte-Carlo trial. If the type_string is “instance,” then one value is generated for each instance that references this value, and a new set of values for these instances is generated for each Monte-Carlo trial. See 6.4.1 for an example.

9.13.3 Algorithm for probablistic distribution

17.9.3 of IEEE std 1364-2005 Verilog HDL contains the C-code to describe the algorithm of probabilistic system functions based on the seed value passed to them.

This code also describe the algorithm of the IEEE std 1364-2005 Verilog HDL probabilistic functions extentions in Verilog-AMS HDL as indicated in Table 9-25.

Table 9-25—Verilog AMS to C function cross-listing

9.14 Math system functions

Verilog-AMS HDL extends the IEEE std 1364-2005 Verilog HDL math functions so that they can be used from the analog context.

All of these functions, except $clog2, are aliases of the analog math operators described in 4.3.1 and Table 4-14 shows which analog math operators are aliases of which math system functions.

The system function $clog2 shall return the ceiling of the log base 2 of the argument (the log rounded up to an integer value). $clog2 is defined more completely in IEEE std 1364-2005 Verilog HDL.

Users are encourage to use the system function version of the math operation instead of the operator for better compatability with IEEE std 1364-2005 Verilog HDL.

9.15 Analog kernel parameter system functions

Verilog AMS HDL adds a set of system functions called the analog kernel parameter functions.

The syntax for these functions are shown in Syntax 9-10.

environment_parameter_functions ::= $temperature

| $vt [ ( temperature_expression ) ]

| $simparam ( param_name [, expression] )

| $simparam$str ( param_name )

Syntax 9-10—Syntax for the environment parameter functions

These functions return information about the current environment parameters as a real value.

$temperature does not take any input arguments and returns the circuit’s ambient temperature in Kelvin units.

$vt can optionally have temperature (in Kelvin units) as an input argument and returns the thermal voltage (kT/q) at the given temperature. $vt without the optional input temperature argument returns the thermal voltage using $temperature.

$simparam() queries the simulator for a real-valued simulation parameter named param_name. The argument param_name is a string value, either a string literal, string parameter, or a string variable. If param_name is known, its value is returned. If param_name is not known, and the optional expression is not supplied, then an error is generated. If the optional expression is supplied, its value is returned if param_name is not known and no error is generated. $simparam() shall always return a real value; simulation parameters that have integer values shall be coerced to real. There is no fixed list of simulation parameters. However, simulators shall accept the strings in Table 9-26 to access commonly-known simulation parameters, if they support the parameter. Simulators can also accept other strings to access the same parameters.

Table 9-26—Simulation real and integer parameter names

Table 9-26—Simulation real and integer parameter names (continued)

The values returned by simulatorVersion and simulatorSubversion are at the vendor’s discretion, but the values shall be monotonically increasing for new versions or releases of the simulator, to faciliate checking that the simulator supports features that were added in a certain version or sub-version.

Examples:

In this first example, the variable gmin is set to the simulator’s parameter named gmin, if it exists, otherwise, an error is generated.

gmin = $simparam("gmin");

In this second example, the variable sourcescale is set to the simulator’s parameter named sourceScaleFactor, if it exists, otherwise, the value 1.0 is returned.

sourcescale = $simparam("sourceScaleFactor", 1.0);

$simparam$str is similar to $simparam. However it is used for returning string-valued simulation parameters. Table 9-27 gives a list of simulation string parameter names that shall be supported by $simparam$str.

Example:

module testbench; dut dut1;

endmodule module dut;

9.16 Dynamic simulation probe function

Verilog-AMS HDL supports a system function that allows the probing of values within a sibling instance during simulation.

dynamic_monitor_function ::=

$simprobe ( inst_name , param_name [, expression] )

Syntax 9-11—Syntax for the dynamic monitor function

$simprobe() queries the simulator for an output variable named param_name in a sibling instance called inst_name. The arguments inst_name and param_name are string values, either a string literal, string parameter, or a string variable. To resolve the value, the simulator will look for an instance called inst_name in the parent of the current instance i.e. a sibling of the instance containing the $simprobe() expression. Once the instance is resolved, it will then query that instance for an output variable called param_name. If either the inst_name or param_name cannot be resolved, and the optional expression is not supplied, then an error shall be generated. If the optional expression is supplied, its value will be returned in lieu of raising an error. The intended use of this function is to allow dynamic monitoring of instance quantities.

Example:

module monitor;

parameter string inst = "default"; parameter string quant = "default"; parameter real threshold = 0.0; real probe;

analog begin

probe = $simprobe(inst,quant); if (probe > threshold) begin

$strobe("ERROR: Time %e: %s#%s (%g) > threshold (%e)", $abstime, inst,quant, probe, threshold);

$finish; end

end endmodule

The module monitor will probe the quant in instance inst. If its value becomes larger than threshold, then the simulation will raise an error and stop.

module top(d,g,s); electrical d.g.s; inout d,g,s;