Virtuoso XL Layout Editor User Guide

Using the Virtuoso Custom Placer

After the placer initializes, the Virtuoso XL Placement Status window appears.

Important

The text columns in the Virtuoso XL Placement Status form do not align if a variable pitch font is used. You must use a fixed size text font. The default text font is a fixed size text font. You can change the text font by using CIW – Options – User Preference.

The placer moves pins that were not assigned to placement information inside the design boundary and aligns to any boundary edge.

You can use the Edit – Undo command to discard the placement results.

Stopping the Placer

To stop the placer before it has completed all placement passes,

1.Select PlacePlacer.

2.Set the options in the Auto Placer form and click OK.

Virtuoso XL Layout Editor User Guide

Using the Virtuoso Custom Placer

The XL Placement Status form appears.

3. In the Virtuoso XL Placement Status form select Process-Stop Placer.

Running Load Balancing Service (LBS)

LBS allows the placer to support load sharing capability. The prerequisites for running LBS are;

■Set either the Cadence default LBS queue or an LSF queue. In the later case, a Unix environmental variable called LBS_BASE_SYSTEM should be set to LBS_LSF.

■Set the search path to include the path to any load sharing service scripts.

■Activate the load sharing queue deamons.

■Disk directories must have been exported to enable load sharing service to work across the network.

■Password restricitions have been eliminated to enable batch automatic login from one machine to the other.

Troubleshooting Placement Results

This section discusses common placement problems and some possible solutions.

Problem: Components were placed with overlaps.

Solution: The boundary region or the rows are too small. Redraw the boundary or rows.

Refining Placement Results

To refine the placement results,

■Set grouping and fixed constraints by choosingTools – Constraint Manager in the CIW

■Redefine the row boundaries

■For MOS transistor-level designs, modify the layout for one or more transistors with the

Edit – Transistor Chaining and Transistor Folding commands