- •Contents
- •Preface
- •Related Documents
- •Typographic and Syntax Conventions
- •Introduction to the Virtuoso XL Layout Editor
- •Editing Your Technology File for Virtuoso XL Layout Editor
- •Sample Technology File
- •Virtuoso XL Technology File Requirements
- •Layer Rules
- •Devices
- •Physical Rules
- •Virtuoso XL Rules (lxRules)
- •Compactor Rules
- •Preparing Your Connectivity Source for the Virtuoso XL Layout Editor
- •Placing Design Elements
- •Using Design Variables
- •Netlist Processor Expressions
- •Analog Expression Language Expressions
- •Simulation Design Variables
- •Using One-to-Many Mapping
- •Iterated Instances and Bus Pins
- •Multiplication Factor (mfactor)
- •Series-Connection Factor (sfactor)
- •One-to-Many Assignment with the Update Device Correspondence
- •Using Many-to-Many or Many-to-One Mapping
- •Modifying Many-to-Many or Many-to-One Mapping Between Components
- •Deleting Many-to-Many or Many-to-One Mapping Between Components
- •Using Virtuoso XL Properties
- •Using the lxUseCell Property to Specify Layout Devices to Use
- •Using the lvsIgnore Property to Exclude Schematic Symbols
- •Using the lxlgnoredParams Property to Exclude Device Properties
- •Using the lxRemoveDevice property to Ignore Parasitic Devices
- •Using the lxViewList and lxStopList Properties to Prepare Hierarchical Designs
- •Using the lxCombination Property to Build Complex Devices
- •Preparing Instances and Pins in Your Layout for the Virtuoso XL Layout Editor
- •Preparing Pins for the Virtuoso XL Layout Editor
- •Preparing Pins for Permutability
- •Search Order Variable
- •Syntax
- •Macros
- •Setting the permuteRule Property in the Symbol Master
- •Setting the permuteRule Property in the Device Master
- •Setting the permuteRule Property in the Symbol Instance
- •Setting the permuteRule Property in the Device Instance
- •Setting the permuteRule Property in the Component Description Format
- •Preparing Instances for Hierarchical Connectivity Checking
- •Setting Up Your Desktop
- •Customizing Your Desktop Layout
- •Using Multiple Cellviews
- •Printing to the Command Interpreter Window
- •Changing Display Colors
- •Using Bindkeys
- •Displaying Bindkeys
- •Loading Virtuoso XL Bindkeys
- •Setting Environment Variables
- •Information About Online Forms
- •Layout XL Options Form
- •Introduction to Abutment
- •Abutment Requirements
- •Setting Up Cells for Abutment
- •abutAccessDir
- •abutClass
- •Steps in Auto-Abutment
- •Sample Parameterized Cells Set Up for Abutment
- •Example 1
- •Example 2
- •Creating CMOS Pcells to Use with Abutment
- •autoAbutment Properties
- •The abutMosStretchMat Property
- •abutMosStretchMat Rules for MOS Abutment
- •Example Code Setting MOS Abutment Properties
- •Setting Environment Variables for Abutment
- •Move Together
- •Constraint Assisted
- •Using Device Abutment
- •Generating Your Layout with Virtuoso XL Layout Editor
- •Starting Virtuoso XL from the Schematic
- •Importing a Netlist for a Connectivity Reference
- •Starting Virtuoso XL from the Layout View
- •Connectivity Reference as a Netlist
- •Mapping File Structure
- •Working with Template Files
- •Saving Form Contents
- •Loading Template Files
- •Modifying Templates
- •Loading Template Files
- •Creating Template Files
- •Template File Syntax
- •General Syntax Rules
- •Boundaries Section
- •I/O Pins Section
- •Sample Template
- •Generating a Layout with Components Not Placed (Gen From Source)
- •Moving Components from the Schematic into the Layout (Pick from Schematic)
- •Placing a Group of Schematic Elements Together
- •Placing Individual Components
- •Generating Pins
- •Viewing Unplaced Instances/Pins
- •Viewing in Place
- •Manually Abutting Devices Using Pick from Schematic
- •Cloning Components
- •Cloning
- •Troubleshooting
- •Cloning Using Multiple Cellviews
- •Using Correspondence Points
- •Information About Online Forms
- •Add Correspondence Pairs Form
- •Cloning Form
- •Correspondence Pairs Form
- •Import XL Netlist Form
- •Layout Generation Options Form
- •Open File Form
- •Pick from Schematic Form
- •Remove Correspondence Components Form
- •Set Pin Label Text Style Form
- •Startup Option Form
- •Template File Form
- •Editing Your Layout with Virtuoso XL Layout Editor
- •Identifying Incomplete Nets
- •Moving Objects Manually in the Virtuoso XL Layout Editor
- •Moving Objects Using Move Options
- •Setting the Move Form to Appear Automatically
- •Aligning Objects
- •Post Selecting Devices
- •PreSelecting Devices
- •Swapping Components
- •Permuting Component Pins
- •Permuting Pins Manually
- •Checking Permutation Information
- •Using Device Locking
- •Using Automatic Spacing
- •Using Interactive Device Abutment
- •Setting Component Types
- •About Component Types
- •MOS Transistor Stacking and Folding Parameters
- •Modifying a Component Type
- •Using Transistor Chaining
- •Using Transistor Folding
- •Controlling the Folding Grid
- •Folding Transistors
- •Adding Instances to a Layout
- •Adding Pins to a Layout
- •Assigning Pins to a Net
- •Maintaining Connectivity When Editing a Flattened Pcell
- •Information About Online Forms
- •Assign Nets Form
- •Edit Component Types Form
- •Move Form
- •Set Transistor Folding Form
- •Show Incomplete Nets Form
- •Stretch Form
- •Virtuoso XL Alignment Form
- •Using the Virtuoso Custom Placer
- •Overview
- •Main Features
- •Place Menu Command Summary
- •Other Commands Used with the Virtuoso custom placer
- •Placement Styles
- •Setting Up the Virtuoso XL Layout Editor for Placement
- •Identifying the Placement Translation Rules
- •Setting Cadence Design Framework II Environment Variables
- •Setting Environment Variables for the Virtuoso Custom Router and Placer
- •Setting MOS Chaining and Folding Parameters
- •Abutting Standard Cells
- •Using Auto-Abutment During Placement
- •Placement Constraints
- •Constraint Manager Geometric Constraints
- •Pin Placement Constraints
- •Constraint Limitations
- •Placement Parameters and Component Types
- •MOS Transistor Chaining and Folding Parameters
- •Pin Placement
- •Assigning Pins to an Edge
- •Assigning Pins to a Fixed Position
- •Railing Pins
- •Loading the Template File
- •Assigning Spacing Between Pins
- •Saving Pin Placement to a Template File
- •Partitioning the Design
- •Creating a Partition
- •Loading the Template File
- •Saving Partitions to a Template File
- •Setting Placement Planning
- •Assisted CMOS Placement
- •Choose Component Types Form
- •Running the Virtuoso Custom Placer
- •Prerequisites to Placement
- •Running the Virtuoso Custom Placer: Initial Placement
- •Stopping the Placer
- •Running Load Balancing Service (LBS)
- •Troubleshooting Placement Results
- •Running the Virtuoso Custom Placer: Detailed Placement
- •Showing Congestions
- •Information About Forms
- •Auto Placer Form
- •Partitioning Form
- •Choose Component Types Form
- •Pin Placement Form
- •Load Template File Form
- •Placement Planning Form (Assisted CMOS)
- •Placement Planning Form (Assisted Standard Cell)
- •Placement Planning Form (Assisted Mixed CMOS/Standard-Cell)
- •Preparing Your Design for Routing in the Virtuoso XL Layout Editor
- •Understanding Connectivity
- •Pseudo-Parallel Connections
- •Selecting Layers
- •Changing Layers
- •Connecting Nets
- •Creating Paths
- •Connecting Nets with Path Stitching
- •Connecting Nets with Design Shapes
- •Checking Connectivity with Flight Lines
- •Checking Connectivity with Markers
- •Finding Markers
- •Explaining Markers
- •Deleting Single Markers
- •Deleting All Markers
- •Using the Virtuoso Compactor on a Routed Design
- •Overview
- •Main Features
- •Wire Editing Commands
- •Virtuoso Custom Router to Virtuoso XL Command Mapping
- •Prerequisites
- •Rule Information
- •Net Connectivity Information
- •Routing Area Boundary
- •Enabling Wire Editing
- •Toggling Between Virtuoso XL and Wire Editing Enabled
- •Loading ASCII Rules Files
- •The Wire Editing Environment
- •Status Banner
- •Preview Wires and Routing Aids
- •Mouse Button Behavior
- •Using Environment Variables
- •Routing Paths
- •Routing a Single Path
- •Routing Multiple Paths
- •Preventing and Checking Design Rule Violations
- •Interactive Checking
- •Same Net Checking
- •Checking Regions
- •Checking Route and Pin Violations
- •Routing Options and Styles
- •Matching Path Width and Pin Widths
- •Matching Path Width and Pin Widths for Multiple Paths
- •Gathering Bus Wires
- •Spacing for Gathered Bus Wires
- •Overriding Bus Spacing
- •Rotating the Bus Cursor
- •Cycling the Control Wire
- •Allowing Redundant Wiring
- •Allowing Orthogonal Jogs
- •Route To Cursor
- •Allow Floating Nets
- •Connecting Multiple Component Pins
- •Pushing Routes and Components
- •Routing Shielded Nets
- •Routing Tandem Layer Pairs
- •Using Vias
- •Changing Layers and Adding Vias
- •Using Vias Patterns on Multiple Paths
- •Legal Via Sites
- •Rotating Vias
- •Pseudo Vias
- •Editing Routed Connections
- •Stretching Paths and Vias
- •Splitting and Stretching Paths
- •Copying Routes
- •Using Critic Wire
- •Compacting Paths Using Pull
- •Displaying Reports
- •Displaying Routing Status Reports
- •Displaying Network Reports
- •Displaying Component Reports
- •Displaying Net Reports
- •Creating Rules Reports
- •Search Reports
- •Saving Reports
- •Setting Constraints
- •Using the Virtuoso Constraint Manager
- •Using .do Files
- •About the Forms
- •Add Via Form
- •Check Routes Form
- •Create Path Form
- •Find File Form
- •Layout
- •Reports Form
- •Route Options Form
- •Save As Form
- •Search Form
- •Split Form
- •Via Pattern Pop-up
- •Reports
- •Route Status Report Window
- •Network Report Window
- •Instance Report Window
- •Net Report Window
- •Rules Report Window
- •Setting Environment Variables
- •Troubleshooting
- •Finding Design Elements (Probing)
- •Probing Hierarchical Designs
- •Removing Probes
- •Exiting the Probe Command
- •Showing the Options Form
- •Checking Shorts and Opens
- •Comparing Design Elements and Parameters (Checking against the Connectivity Source)
- •Information About Online Forms
- •Probe Options Form
- •Updating Design Data in Virtuoso XL
- •Updating Layout Parameters
- •Updating Schematic Parameters
- •Updating Device Correspondence
- •Creating Device Correspondence
- •Needed Mode
- •Computer Aided Mode
- •Updating the Connectivity Reference
- •Changing the Device (Instance) View
- •Information About Online Forms
- •Change Instance View Form
- •Create Device Correspondence
- •Problems with the Interface
- •Invalid Markers from Previous Software Versions
- •Options Form Does Not Appear
- •Virtuoso XL Performance Is Slow
- •Problems with Editing
- •Components Move Slowly
- •Extra Probes Appear
- •Layout Generation Options Form Does Not Keep Values from the Last Entry
- •Parameters Not Updated
- •Schematic Not Editable
- •Warning to Update Your Design Appears at Startup
- •Problems with Connectivity
- •Connections Not Made
- •Incomplete Nets Command Does Not Recognize Connected Pins and Nets
- •Markers for Nonexistent Overlaps and Shorts Appear
- •Path Ends Not Accepted
- •Placement and Routing Do Not Run
- •Virtuoso XL Does Not Recognize Physical Vias
- •Moving Software Executables To a New Location
- •Environment Variables
- •Virtuoso XL Layout Editor
- •alignApplySeparation
- •alignApplySpacings
- •alignDirection
- •alignLayer
- •alignMethod
- •alignSelectionMode
- •alignSeparation
- •allowRotation
- •autoAbutment
- •autoArrange
- •autoPermutePins
- •autoSpace
- •checkTimeStamps
- •ciwWindow
- •compTypeRefLibs
- •constraintAssistedMode
- •createBoundaryLabel
- •crossSelect
- •extractEnable
- •extractStopLevel
- •globalPlacement
- •ignoredParams
- •ignoreNames
- •incNetCycleHilite
- •incNetHiliteLayer
- •infoWindow
- •initAspectRatio
- •initAspectRatioOption
- •initBoundaryLayer
- •initCreateBoundary
- •initCreateInstances
- •initCreateMTM
- •initCreatePins
- •initDoFolding
- •initDoStacking
- •initEstimateArea
- •initGlobalNetPins
- •initIOLabelType
- •initIOPinLayer
- •initIOPinName
- •initPinHeight
- •initPinMultiplicity
- •initPinWidth
- •initPrBoundaryH
- •initPrBoundaryW
- •initSymbolicPins
- •initUtilization
- •layoutWindow
- •lswWindow
- •lxAllowPseudoParallelNets
- •lxDeltaWidth
- •lxFingeringNames
- •lxGenerationOrientation
- •lxGenerationTopLevelOnly
- •lxInitResetSource
- •lxStackMinimalFolding
- •lxStackPartitionParameters
- •lxWidthTolerance
- •maintainConnections
- •mfactorNames
- •mfactorSplit
- •moveAsGroup
- •openWindow
- •optimizePlacement
- •paramTolerance
- •pathProbe
- •pathPurposeList
- •pathSwitchLayer
- •pathSwitchPurpose
- •preserveTerminalContacts
- •probeCycleHilite
- •probeDevice
- •probeHiliteLayer
- •probeInfoInCIW
- •probeNet
- •probePin
- •rowGroundLayer
- •rowGroundName
- •rowGroundWidth
- •rowPowerLayer
- •rowPowerName
- •rowPowerWidth
- •rowSupplyPosition
- •rowSupplySpacing
- •rowMOSSupplyPattern
- •rowSTDAllowFlip
- •rowSTDSupplyPattern
- •rulesFile
- •runTime
- •saveAs
- •saveAsCellName
- •saveAsLibName
- •saveAsViewName
- •schematicWindow
- •setPPConn
- •sfactorNames
- •sfactorParam
- •showIncNetEnable
- •stopList
- •templateFileName
- •traverseMixedHierarchies
- •updateReplacesMasters
- •updateWithMarkers
- •vcpConductorDepth
- •vcpKeepoutDepth
- •viewList
- •Wire Editor
- •allowFloatingNets
- •allowJogs
- •allowRedundantWiring
- •autoAdjustLength
- •autoShield
- •busOverride
- •busOverrideValue
- •busWireSpacing
- •busWireSpacingType
- •checkCornerCorner
- •checkCrosstalk
- •checkLength
- •checkLimitWay
- •checkMaxProcessWireWidth
- •checkMaxStackViaDepth
- •checkMaxTotalVia
- •checkMinMaskEdgeLength
- •checkMinProcessWireWidth
- •checkMiter
- •checkNetOrder
- •checkOffManGridPin
- •checkOffWireGridPin
- •checkPinSpacing
- •checkPolygonWire
- •checkProtected
- •checkReentrantPath
- •checkRegion
- •checkSameNet
- •checkSegment
- •checkStub
- •checkUseLayers
- •checkUseVias
- •checkWireExtension
- •doFile
- •enableBusRouting
- •enableTandemPair
- •gatherBusWires
- •inaccessiblePin
- •interactiveChecking
- •matchPinWidth
- •matchPinWidthValue
- •matchWireWidth
- •multiplePinsConnection
- •pinLargerMaxProcessWidth
- •pinSmallerMinProcessWidth
- •pushComponent
- •pushRouting
- •routeAsManyAsPossible
- •routeToCursor
- •routeToCursorStyle
- •sameNetChecking
- •showTimingMeter
- •showTimingOctagon
- •snapToPinOrigin
- •useDoFile
- •useRulesFile
- •viaAssistance
- •viaPattern
- •Private Environment Variables
- •Virtuoso XL Command Quick Reference
- •Using Spice and CDL For Netlist Driven Layout Generation
- •Introduction
- •Specifying Spice Designs
- •Cell Creation Rules
- •Character Considerations
- •Spice Statements
- •File Level Statements
- •Statements Allowed at File Level or within a Subckt Cell or a Top Level Cell
- •Statements Allowed within a Subckt Cell or a Top Level Cell
- •Spice Design Example
- •CDL Design Example
- •Parameter Resolution
- •Parameter Levels
- •Resolving Parameters
- •Putting the Rules Together (Examples)
- •Parameter Scaling
- •Complete ibuf Example Results
- •Virtuoso XL .do File Commands
- •Rule Hierarchy
- •circuit
- •Syntax
- •Example
- •Syntax
- •Example
- •limit
- •Syntax
- •Example
- •rule
- •Syntax
- •Example
- •Syntax
Virtuoso XL Layout Editor User Guide
Editing Your Layout with Virtuoso XL Layout Editor
To assign colors other than the default colors to the flight lines you specify, follow these steps.
1.In the Incomplete nets list box, select the names of the nets whose color you want to change.
2.In the color choice cyclic field, select the color you want the nets to be.
3.Click Set Color.
The color of the net changes to the color you specified.
To turn off flight lines in the layout window,
From the layout window, choose the Connectivity – Hide Incomplete Nets command.
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Show Incomplete Nets |
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Hide Incomplete Nets |
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Note: If editing commands run slowly while the Show Incomplete Nets command is active, use the Incomplete Nets form to turn off the display of incomplete nets on all the nets except the nets you are working on.
Moving Objects Manually in the Virtuoso XL Layout Editor
To move objects (devices, pins, or shapes) in the layout window, follow these steps.
1.From the layout window, choose Edit – Move.
The layout window prompts you to select an object to move.
2.Click on the object you want to move in either the layout or the schematic.
The object is highlighted in both the schematic and layout windows. An outline of the object appears in the layout window and follows the cursor until you click in the layout window to place the object.
Drag lines show connections from pins of the selected object to pins of the nearest instance or the nearest I/O pin.
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Product Version 5.0 |
Virtuoso XL Layout Editor User Guide
Editing Your Layout with Virtuoso XL Layout Editor
The layout window prompts you to click on the new location in the layout where you want to place the selected object.
3.Click on the location where you want to place the object.
The object moves to the new location.
Note: If you select a component in the layout or the schematic before you choose the Move command, Virtuoso XL highlights the corresponding component in the schematic or layout.
4.Click on the next object you want to move or press Escape to cancel the command.
Note: Using the Move command cancels any existing commands in the current or in other windows.
Moving Objects Using Move Options
When you move objects, you can use the Move form to change
■The layer of the object you select
■The angles at which you can move the object
■The presence of drag lines on the object as you move it
■The orientation of the object you select
■The use of placement constraints
■The ability to move members of constrained groups individually or together
To use the Move options form to place components, follow these steps.
1.From the layout window, choose Edit – Move.
2.Press F3.
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Virtuoso XL Layout Editor User Guide
Editing Your Layout with Virtuoso XL Layout Editor
The Move form appears. The Display Draglines and Constraint Assisted Control options appear on the Move form only when you are running Virtuoso XL.
3.If you want to change the angle at which you can move an object (any angle, diagonal, orthogonal, horizontal, vertical), choose the angle you want from the Snap Mode cyclic field.
4.If you want to change the layer on which a shape is drawn, turn on Change To Layer and choose a new layer from the cyclic field.
The layer is updated when you move the cursor into the layout window.
5.If you want to turn the drag lines off or on for an object you move, turn
Display Draglines off or on.
Drag lines connect pins on the object to the nearest pins on another object on the net. When you move the object closer to a different object on the same net, the lines reconnect to the new object. These drag lines appear only in Virtuoso XL.
Note: Disabling Display Draglines can speed up the action of the Move command.
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Virtuoso XL Layout Editor User Guide
Editing Your Layout with Virtuoso XL Layout Editor
6.To move groups of components bound by placement constraints as a unit or individually, turn on together or individually.
If a group of components you move is affected by placement constraints, those constraints are obeyed during the duration of the Move command.
If a single component you move is subject to an unsatisfied Distance, Fixed, or Grouping (with a fence) constraint, and you move it across a coordinate that satisfies the constraint, the component snaps to that coordinate.
Components restricted by Alignment or Symmetry constraints do not snap to coordinates when you move them, but if their constraints have already been satisfied, you can move them only in ways that do not break the constraints.
In the case of a group constraint with a fence, the Move command lets you move the device until it is inside the fence; after that, you cannot move it outside the fence.
7.Use the Delta X/Y fields to type in the coordinates of the selected devices instead of using your cursor to move devices. In the Delta X and Y text fields type the amount of coordinates to move the devices, and the click Apply XY.
8.To turn off the use of placement constraints for the components you move, turn on ignore.
9.To change the orientation of the object, click on the button describing the orientation you want (Rotate, Sideways, or Upside Down).
The orientation of the object changes when you move your cursor into the layout window.
Note: When you use the Edit – Stretch command with Virtuoso XL running, the
Display Draglines and the Constraint Assisted Control options also appear on the
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