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Virtuoso XL Layout Editor User Guide

Using the Virtuoso Custom Placer

Overview

The Virtuoso® custom placer is an automated solution for placing transistors, devices, and cells in both block and cell-level designs. This is a generic placer that can be used for a variety of placement styles. You control placement using topological and geometric constraints.

You begin placement by generating layout connectivity and circuit components with the

Virtuoso XL layout editor (Virtuoso XL) layout generation commands. The connectivity source can be either a Virtuoso schematic composer design or a CDL netlist.

Main Features

The main features of the Virtuoso custom placer are the following:

Re-entrant automated batch placement capability within the Virtuoso Layout environment

Connectivity and constraint-driven placement to achieve overall shortest wiring length

Supports a wide variety of placement styles automatically

Row-based MOS

Row-based standard cell

Area-based analog

Supports any combination of the above placement styles concurrently

Manual capabilities to partition placement

Accelerates engineering change orders

Placement constraints supported:

Distance

Alignment

Grouping

Symmetry

Fixed

Automatic row generation for both device-level MOS and standard cells designs

Automated pin placement positioning user interface

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Assigns pins to any edge of placement boundary

Supports ordered and unordered pins

Provides the ability to fix pin positions

Place groups of pins at any given spacing

Multiple pins of the same net

Place Menu Command Summary

The Virtuoso XL Place menu contains these commands:

Pin Placement, which opens the Pin Placement form

Use this command to specify pin location constraints. This command can also be used to preplace pins independently from the placer.

Partitioning, which opens the Partitioning form.

Use this command to cluster components together. Partitions are used in Placement Planning.

Placement Planning, which opens the Placement Planning form Use this command to create/modify/edit rows.

Placer, which opens the Auto Placer form Use this command to run the automatic placer.

Show Congestions and Hide Congestions, which toggle the display of congested areas on the layout

Rules – Open Rules, which opens the Open Place & Route Rules form

Use this command to open the placement rules from an ASCII file or the technology file.

Rules – New Rules, which opens the New Place & Route Rules form Use this command to create new placement rules.

Other Commands Used with the Virtuoso custom placer

Design – Component Types, which opens the Edit ComponentTypes form

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Use this command to update your library with information to guide the placement of components in rows, and to define parameters for MOS device chaining and folding.

Placement Styles

For row-based MOS transistor-level placement:

Diffusion sharing is optimized through both automatic and interactive (with the Pick from

Schematic command) transistor chaining during layout generation. Maximizing diffusion sharing minimizes the diffusion gaps in the generated layout

For standard cell placement:

You can place custom and standard cells in single or multiple rows. Rows can be either horizontal or vertical.

Figure 9-1 Custom Cells Aligned to Top, with Same Rail Pitch but Different Heights

Row Shape

There are two modes of row definition: user-defined (manual) and component-assisted. In user-defined mode, you define the geometry of a series of rows and specify how to align and orient components in the rows. In component-assisted mode, the application defines row geometries for you based on area utilization goals and other design goals you specify. This allows the user to adjust various aspects of the design to explore different scenarios.

Note: Row-based is the most structured of all the placement styles. You define specific component types to only be placed with these rows. The devices are constrained within the row to certain orientations and alignments.

Area-based is the least restrictive of the placement styles. Area placement does not require component types or other constraints. The Virtuoso custom placer will place devices within the placement boundary and work to reduce the overall wire length between the devices. At the same time individual constraints that have been placed upon the devices are honored.

With area-based placements the Virtuoso custom placer has the freedom to place devices anywhere within the placement boundary unless devices have been locked down outside of the placement boundary. Without individual constraints on devices or groups of devices, the

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