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Virtuoso XL Layout Editor User Guide

Wire Editing in the Virtuoso XL Layout Editor

From the Layout pop-up menu, choose Route Only If All Succeed.

No new segments are added if there is insufficient routing space for all the wires of the set.

Continue digitizing points to complete one or more connections.

Double click or press the Return key.

The paths will ended where the cursor is positioned.

Note: To erase the segments you draw, press the Back Space key. Each time you click

Back Space, the last digitized segment is deleted.

Preventing and Checking Design Rule Violations

Interactive Checking

Prevent clearance rule violations between routing objects such as paths, vias, and pins while routing by doing the following:

1.From the layout window, choose Options – Route. The Route Options form appears.

2.Turn Interactive Checking on.

Conflicts and design rule violations such as clearance rules are not allowed.Interactive Checking also prevents routing outside of the boundary area.

Note: When you are in an active command, you can turn interactive checking on by choosing Turn checking on from the Layout pop-up menu.

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Wire Editing in the Virtuoso XL Layout Editor

You can check for specific types of routing and pin violations through the Check Routes form. For more information, refer to “Checking Route and Pin Violations” on page 377.

Same Net Checking

By default, same net violations are not checked. Prevent same net violations such as gaps, notches, and self-intersecting nets by doing the following:

Note: The Same Net Checking option can slow the performance of wire editing. In best practice, this should be used after you have finished all routing and before running final verification on your design.

1.From the layout window, choose Options – Route.

2.The Route Options form appears.

3.Turn Same Net Checking on.

Same net gaps, notches, self intersecting nets, or loops are not allowed.

You can check for existing same-net violations through the Check Routes form. For more information, refer to “Checking Route and Pin Violations” on page 377.

Checking Regions

Check Region controls whether path segments are checked at region boundaries when you are creating or editing paths. A region is a routing area where you want different clearances or width rules to apply. For more information about creating regions, see “CreatingRegions” on page 377.

When Check Region is on, path segments are halted at a region boundary until you click at the boundary. A pseudopin will be inserted for each net, and then you can continue routing or moving the path segments into or out of the region. If you are routing multiple paths that are not part of a bundle or differential pair, the paths fan out to accommodate different width or clearance rules.

When Check Region is off, region boundaries and rule differences are ignored when you route or move path segments into or out of a region.

Control checking of regions by doing the following:

1.From the layout window, choose Options – Route.

2.The Route Options form appears.

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Wire Editing in the Virtuoso XL Layout Editor

3. Turn Check Region on.

Creating Regions

Define routing areas where you want different clearances or wire widths by creating a.do file with region and clearance rules. Region rules have the highest precedence in the rule hierarchy; therefore, the region clearance and width rules override all other clearance and width rules.

To define a region, follow these steps:

1.Create a .do file to define a region and assign rules to the region using the following syntax.

Choose the shape (rectangle or polygon), specify its layer and location, and assign the clearance rules and width rules you want to apply within the region. You can also assign an optional region name. For example:

define (region REG1 (rect metal1 10.5 2.75 55.05 5.5) (rule (width .8) (clearance 1.2 (type via_wire))))

You can assign rules for the entire region, for a single class or net within the region, or between two classes within the region.

For more information about using the define command to create regions, refer to

Define - Region - By Coordinates in the IC Shape-Based Placer/Router Documentation.

2.Load the .do file.

For more information about loading .do files, refer to,“Loading .do Files” on page 417.

Checking Route and Pin Violations

Use the Check Routes form to control which rule violations and pin data problems are checked and graphically marked.

To check specific types of violations, doing the following:

1. From the layout window, choose Verify Check Routes.

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Wire Editing in the Virtuoso XL Layout Editor

The Check Routes form appears.

2.Turn on the options you want to check.

3.Click OK.

The checking process is initiated.

Checking Violation Markers

Violations will appear as markers, which can be checked using the Verify – Markers – Find command.

To check markers, refer to “Checking Connectivity with Markers” on page 353.

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