- •Features
- •Overview
- •Block Diagram
- •Pin Descriptions
- •Port A (PA7..PA0)
- •Port B (PB7..PB0)
- •Port C (PC7..PC0)
- •Port D (PD7..PD0)
- •Port E (PE7..PE0)
- •Port F (PF7..PF0)
- •Port G (PG4..PG0)
- •RESET
- •XTAL1
- •XTAL2
- •AVCC
- •AREF
- •Resources
- •Data Retention
- •Capacitive touch sensing
- •AVR CPU Core
- •Introduction
- •Status Register
- •Stack Pointer
- •I/O Memory
- •Overview
- •Timing
- •Using all Locations of External Memory Smaller than 64 Kbyte
- •Clock Systems and their Distribution
- •CPU Clock – clkCPU
- •I/O Clock – clkI/O
- •Flash Clock – clkFLASH
- •ADC Clock – clkADC
- •Clock Sources
- •Crystal Oscillator
- •External Clock
- •Idle Mode
- •Power-down Mode
- •Power-save Mode
- •Standby Mode
- •Analog Comparator
- •Brown-out Detector
- •Watchdog Timer
- •Port Pins
- •Resetting the AVR
- •Reset Sources
- •Power-on Reset
- •External Reset
- •Watchdog Reset
- •Watchdog Timer
- •Timed Sequences for Changing the Configuration of the Watchdog Timer
- •Safety Level 0
- •Safety Level 1
- •Safety Level 2
- •Interrupts
- •I/O Ports
- •Introduction
- •Configuring the Pin
- •Reading the Pin Value
- •Unconnected pins
- •Alternate Port Functions
- •Register Description for I/O Ports
- •8-bit Timer/Counter0 with PWM and Asynchronous Operation
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Normal Mode
- •Fast PWM Mode
- •8-bit Timer/Counter Register Description
- •Overview
- •Registers
- •Definitions
- •Compatibility
- •Counter Unit
- •Input Capture Unit
- •Noise Canceler
- •Force Output Compare
- •Normal Mode
- •Fast PWM Mode
- •16-bit Timer/Counter Register Description
- •Internal Clock Source
- •Prescaler Reset
- •External Clock Source
- •8-bit Timer/Counter2 with PWM
- •Overview
- •Registers
- •Definitions
- •Counter Unit
- •Normal Mode
- •Fast PWM Mode
- •8-bit Timer/Counter Register Description
- •Output Compare Modulator (OCM1C2)
- •Overview
- •Description
- •Timing Example
- •Slave Mode
- •Master Mode
- •Data Modes
- •USART
- •Dual USART
- •Overview
- •AVR USART vs. AVR UART – Compatibility
- •Clock Generation
- •External Clock
- •Frame Formats
- •Parity Bit Calculation
- •Parity Generator
- •Receiver Error Flags
- •Parity Checker
- •Disabling the Receiver
- •Using MPCM
- •Features
- •TWI Terminology
- •Transferring Bits
- •Address Packet Format
- •Data Packet Format
- •Overview of the TWI Module
- •Scl and SDA Pins
- •Bus Interface Unit
- •Address Match Unit
- •Control Unit
- •Using the TWI
- •Master Receiver Mode
- •Slave Receiver Mode
- •Miscellaneous States
- •Analog Comparator
- •Analog to Digital Converter
- •Features
- •Operation
- •Changing Channel or Reference Selection
- •ADC Input Channels
- •Analog Input Circuitry
- •Features
- •Overview
- •TAP Controller
- •PRIVATE0; $8
- •PRIVATE1; $9
- •PRIVATE2; $A
- •PRIVATE3; $B
- •Bibliography
- •Features
- •System Overview
- •Data Registers
- •Bypass Register
- •Reset Register
- •EXTEST; $0
- •IDCODE; $1
- •AVR_RESET; $C
- •BYPASS; $F
- •Scanning the ADC
- •ATmega128 Boundary-scan Order
- •Application Section
- •Programming Time for Flash when Using SPM
- •Simple Assembly Code Example for a Boot Loader
- •Fuse Bits
- •Latching of Fuses
- •Signature Bytes
- •Calibration Byte
- •Signal Names
- •Chip Erase
- •Reading the Flash
- •Reading the EEPROM
- •Data Polling Flash
- •Data Polling EEPROM
- •AVR_RESET ($C)
- •PROG_ENABLE ($4)
- •Data Registers
- •Reset Register
- •Programming Enable Register
- •Programming Command Register
- •Virtual Flash Page Read Register
- •Performing Chip Erase
- •Reading the Flash
- •Reading the EEPROM
- •Electrical Characteristics
- •Absolute Maximum Ratings*
- •DC Characteristics
- •Speed Grades
- •External Clock Drive Waveforms
- •External Clock Drive
- •Two-wire Serial Interface Characteristics
- •ADC Characteristics
- •External Data Memory Timing
- •Idle Supply Current
- •Pin Pull-up
- •Pin Driver Strength
- •Register Summary
- •Instruction Set Summary
- •Ordering Information
- •Packaging Information
- •Errata
- •ATmega128 Rev. F to M
ATmega128
Idle Supply Current |
Figure 168. Idle Supply Current vs. Frequency (0.1 - 1.0MHz) |
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1.4 |
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1.2 |
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5.5V |
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1 |
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5.0V |
(mA) |
0.8 |
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4.5V |
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4.0V |
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CC |
0.6 |
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3.6V |
I |
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3.3V |
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3.0V |
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0.4 |
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2.7V |
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0.2 |
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0 |
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0 |
0.1 |
0.2 |
0.3 |
0.4 |
0.5 |
0.6 |
0.7 |
0.8 |
0.9 |
1 |
Frequency (MHz)
Figure 169. Idle Supply Current vs. Frequency (1 - 20MHz)
25 |
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5.5V |
20 |
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5.0V |
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4.5V |
15 |
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4.0V |
(mA) |
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CC |
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I |
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10 |
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3.6V |
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5 |
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3.3V |
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3.0V |
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2.7V |
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0 |
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0 |
2 |
4 |
6 |
8 |
10 |
12 |
14 |
16 |
18 |
20 |
Frequency (MHz)
337
2467X–AVR–06/11
ATmega128
Figure 170. Idle Supply Current vs. VCC (Internal RC Oscillator, 1MHz)
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1.6 |
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1.4 |
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85 °C |
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25 °C |
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1.2 |
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-40 °C |
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1 |
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(mA) |
0.8 |
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CC |
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I |
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0.6 |
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0.4 |
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0.2 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
Figure 171. Idle Supply Current vs. VCC (Internal RC Oscillator, 2MHz)
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3 |
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85 °C |
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25 °C |
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2.5 |
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-40 °C |
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2 |
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(mA) |
1.5 |
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CC |
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I |
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1 |
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0.5 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
338
2467X–AVR–06/11
ATmega128
Figure 172. Idle Supply Current vs. VCC (Internal RC Oscillator, 4MHz)
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6 |
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-40 °C |
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25 °C |
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5 |
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85 °C |
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4 |
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(mA) |
3 |
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CC |
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I |
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2 |
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1 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
Figure 173. Idle Supply Current vs. VCC (Internal RC Oscillator, 8MHz)
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12 |
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-40 °C |
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25 °C |
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10 |
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85 °C |
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8 |
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(mA) |
6 |
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CC |
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I |
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4 |
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2 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
339
2467X–AVR–06/11
ATmega128
Power-down Supply
Current
Figure 174. Idle Supply Current vs. VCC (32kHz External Oscillator)
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60 |
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50 |
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25 °C |
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40 |
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(uA) |
30 |
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CC |
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I |
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20 |
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10 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
Figure 175. Power-down Supply Current vs. VCC (Watchdog Timer Disabled)
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4.5 |
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4 |
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85 |
°C |
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3.5 |
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3 |
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(uA) |
2.5 |
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CC |
2 |
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I |
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1.5 |
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-40 |
°C |
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1 |
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25 |
°C |
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0.5 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
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VCC (V)
340
2467X–AVR–06/11
ATmega128
Power-save Supply
Current
Figure 176. Power-down Supply Current vs. VCC (Watchdog Timer Enabled)
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35 |
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30 |
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85 |
°C |
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25 |
°C |
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25 |
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-40 |
°C |
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(uA) |
20 |
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CC |
15 |
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I |
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10 |
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5 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
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VCC (V)
Figure 177. Power-save Supply Current vs. VCC (Watchdog Timer Disabled)
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16 |
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14 |
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25 °C |
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12 |
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10 |
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(uA) |
8 |
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CC |
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I |
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6 |
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4 |
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2 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
341
2467X–AVR–06/11
ATmega128
Standby Supply |
Figure 178. Standby Supply Current vs. VCC, |
Current |
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0.2 |
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0.18 |
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6 MHz Xtal |
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0.16 |
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6 MHz Res |
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0.14 |
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4 MHz Res |
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0.12 |
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4 MHz Xtal |
(mA) |
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0.1 |
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2 MHz Res |
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CC |
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2 MHz Xtal |
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I |
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0.08 |
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455 kHz Res |
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0.06 |
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1 MHz Res |
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0.04 |
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0.02 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
Figure 179. Standby Supply Current vs. VCC (CKOPT programmed)
2.5 |
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16 MHz Xtal |
2 |
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12 MHz Xtal |
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1.5 |
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6 MHz Xtal |
(mA) |
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4 MHz Xtal |
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CC |
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I |
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1 |
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0.5 |
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0 |
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2.5 |
3 |
3.5 |
4 |
4.5 |
5 |
5.5 |
VCC (V)
342
2467X–AVR–06/11