USB System Architecture

•Bus time-out (no response)

•Data toggle error checks

•Babble — transactions occurring beyond end of frame

•LOA — loss of activity on bus

Packet Errors

The USB devices detect three types of packet errors:

•Packet ID (PID) checks

•Cyclic Redundancy Checks (CRC)

•Bit stuff errors

If any of these error conditions exist, the receiver of the packet must ignore the packet and not respond to it in any manner. The receiver consequently never sends a packet back to the transmitter if the packet just received contains an error. Note that the type of packet error detected is not significant to the USB devices or host as it relates to error recovery. However, the host system may capture statistics regarding the nature of packet failures. The following sections discuss each form of packet-related error.

PID Checks

Each packet broadcast over the USB starts with a Packet ID (PID) consisting of four bits and is followed by a PID check field as illustrated in Figure 8-1. The check field is the PID inverted (1’s complement). All potential USB target devices must perform the PID check and ignore the packet if an error is detected, since the definition of the packet is unknown.

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Chapter 8: Error Recovery

Figure 8-1: PID Check

Packet Identifier

PID0 PID1 PID2 PID3 PID0 PID1 PID2 PID3

CRC Errors

Each packet contains CRC bits used to validate the information sent following the Packet ID field. The nature of this information varies depending on the packet type. Each packet contains either 5 or 16 CRC bits, which is determined by the packet’s potential size and its type. Refer to Table 8-1.

Table 8-1: Packet Type and CRC

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USB System Architecture

Table 8-1: Packet Type and CRC

The 5-bit CRC field for the token packets is based on a generator polynomial:

G(X) = X5 + X2 + 1

The bit pattern representing this polynomial is 00101b. The 5-bit residual at the receiver will be 01100b is all bits are received correctly.

The 16-bit CRC field for the data packets is based on the generator polynomial:

G(X) = X16 + X15 + X2 + 1

The bit pattern representing this polynomial is 1000000000000101b. If the data is received without errors, then the 16-bit residual will be 1000000000001101.

Note that the CRC bit stream will contain stuffed bits if the CRC contains six consecutive 1s.

Bit Stuff Errors

Bit stuffing ensures that the sender and receiver of NRZI data maintain synchronization by forcing a transition into the data stream after detecting six consecutive 1s. See the heading entitled “Bit Stuffing” on page 112 for details.

USB receivers expect to see a guaranteed transition (stuffed bit) in the data stream after six consecutive 1s. If a stuffed bit is not present, this indicates that

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