USB System Architecture

Differential Drivers

USB differential drivers can be designed for low-speed, full-speed, or both lowand full-speed operation. A differential driver employs inverting and noninverting buffers. The input signal is applied to both buffers, yielding two outputs (D+ and D-).

Full-Speed Drivers

Full-speed drivers signal across the fully rated cable (shielded/twisted pair). A full-speed cable has a characteristic impedance of 90Ω and a maximum length of 5 meters. Figure 5-12 illustrates a FS connection and the differential drivers and receivers.

Figure 5-12: Full-Speed Differential Drivers and Receivers

The output impedance of the driver must be in the range of 28 to 44 ohms. This impedance is typically achieved with a CMOS buffer implementation by adding series resistors as illustrated in Figure 5-13 on page 107. The specification defines the conditions under which the output impedance is tested and measured.

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Chapter 5: LS/FS Signaling Environment

Figure 5-13: CMOS Buffer with Series Resistors Achieve Specified Output Impedance

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27Ω

Slew rate control is also required to minimize radiated noise and crosstalk. The full-speed rise and fall times are measured between 10% and 90% of the signal swing when driving a capacitive load of 50pf on each line. The characteristics are as follows:

•rise and fall times between 4ns and 20ns.

•output swings between the differential high and low states must be matched to within ± 10% to minimize signal skew and RFI.

•crossover voltage between 1.3 and 2.0 volts.

•transitions must be monotonic.

Figure 5-14 on page 108 illustrates the FS driver and receiver waveforms. Note that the driver impedance (28Ω -44Ω ) and cable impedance (90Ω ) are not matched, so reflections from the receiver end of the cable are expected. The initial driver transition is sufficient to cause a wave front and subsequent reflection at the target device. The reflection at the receiver end causes the receiver to detect the signal transition. The driver is roughly halfway through its full voltage swing when the target detects the transition, resulting in a one-way cable delay of 26ns.

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USB System Architecture

Figure 5-14: Full-Speed Driver and Receiver Waveforms

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Low-Speed Drivers

Low-speed buffers drive their signal across an untwisted wire cable and must only be used when transmitting information between low-speed hub ports and low-speed devices. The rise and fall time of the low-speed signals on this cable must be greater than 75ns to keep RFI within FCC class B limits, and must be less than 300ns to limit timing delays and signaling skew. Using the slew rate specified, the driver must reach the specified static signal levels with smooth rise and fall times and must exhibit minimal reflections and ringing.

Signaling conventions used by low-speed drivers are based on the D- line being terminated at the device with a 1.5KΩ resistor. The resulting idle state for a lowspeed device is a differential “0.”

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