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USB System Architecture (USB 2.0).pdf
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USB System Architecture

Split Transaction Scheduling

Split transactions are scheduled by 2.0 system software to access lowand fullspeed devices that are attached to downstream high-speed hubs. Software schedules split transactions as part of the high-speed bus traffic during microframes. System software can schedule up to 80% of the available bandwidth during a microframe for periodic transactions (isochronous and interrupt). Software reserves 20% of the bandwidth for control transfers, in the event that the bandwidth is needed. Bulk transfers get whatever bandwidth remains after the others have completed.

Split transactions convey isochronous, interrupt, control, and bulk transfers across the high-speed bus to hubs that have lowand full-speed devices attached to their ports. Hence, split transactions that carry periodic transactions are scheduled as part of the 80% of bandwidth available for periodic transactions, while split transactions that access control endpoints may be scheduled within the 20% reserved for control transfers.

Split Transaction Scheduling Example

Figures 17-8 through 17-16 depict the sequence of events that would occur when two split transactions are performed during a 1ms frame. The two transactions are a full-speed isochronous IN with a packet size of 1023 bytes, and a 64 byte low-speed interrupt OUT.

In the example split transaction sequence, the root port has been labeled port 1 and the downstream hub ports are labeled 2 and 3. This convention is used only for ease of reference. Also, below the block diagram is a representation of the activity that will be seen on each of the ports. Note, however, that no attempt is made here to show the timing relationship (e.g., propagation delay) between the different ports.

SOF Packets

The sequence begins with the host delivering the microSOF packet as illustrated in Figure 17-9 on page 302. The microSOF packet is delivered to the HS hub and the high-speed hub delivers a SOF packet to the full-speed device via port 3. Notice that the host delivers a microSOF packet at the beginning of each microframe. These SOF packets keep the hub synchronized with the host’s microframe timing. The SOF packet will have the same frame number for microframes 0-7, which are aligned with the 1ms frame timing.

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Chapter 17: 2.0 Hubs During LS/FS Transactions

Figure 17-8: Example Split Transaction Sequence — Step 1

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Host Delivers Isochronous Start Split

Host software delivers the first start-split transaction during the first microframe (microframe 0). Figure 17-9 illustrates that the contents of the transaction are a start-SPLIT packet followed by an IN token packet. The start-SPLIT packet will specify the address of this hub, port 3, full speed transaction, and isochronous transfer type. The transaction translator will enter this transaction into the periodic buffer and start the full-speed transaction in the following microframe. Note that the maximum packet size for this endpoint is 1023 bytes.

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USB System Architecture

Figure 17-9: Example Split Transaction Sequence — Step 2

 

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Host Delivers Interrupt Start Split

Host software delivers a second start-split transaction during the first microframe (microframe 0). Figure 17-10 illustrates that the contents of this transaction are a start-SPLIT token packet, an OUT token packet, and a data packet. Note that the maximum packet size supported by the target endpoint is 8 bytes, and that the data packet contains an 8 byte payload. The start-SPLIT packet specifies the device address of this hub, a port number of 2, low-speed transfer to the target device, and the interrupt transfer type. The transaction translator will enter this transaction into the periodic buffer and start the transaction in the following microframe.

302

Chapter 17: 2.0 Hubs During LS/FS Transactions

Figure 17-10: Example Split Transaction Sequence — Step 3

 

 

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Fulland Low-Speed Transactions Begin

During the second microframe (microframe 1) the host delivers another microSOF to the hub, and the hub starts the full-speed isochronous IN on port 3 and starts the low-speed interrupt OUT transaction on port 2 as illustrated in Figure 17-11.

The isochronous transaction consists of an IN token followed by a maximumsized data packet that will be returned from the target endpoint and placed into the Complete-Split Buffer. Only a small portion of the 1023 byte packet will return to the transaction translator in microframe 1.

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