Digital design with CPLD applications and VHDL (R. Dueck, 2000)

116 C H A P T E R 4 • Introduction to PLDs and MAX+PLUS II

into a binary form that can be transferred into a PLD via a special interface connected to the parallel port of a PC. ■

4.1 What Is a PLD?

K E Y T E R M S

Programmable logic device (PLD) A digital integrated circuit that can be programmed by the user to implement any digital logic function.

Complex PLD (CPLD) A digital device consisting of several programmable sections with internal interconnections between the sections.

MAX PLUS II CPLD design and programming software owned by Altera Corporation.

Schematic capture A technique of entering CPLD design information by using a CAD (computer aided design) tool to draw a logic circuit as a schematic. The schematic can then be interpreted by design software to generate programming information for the CPLD.

Compile The process used by CPLD design software to interpret design information (such as a drawing or text file) and create required programming information for a CPLD.

One of the most far-reaching developments in digital electronics has been the introduction of programmable logic devices (PLDs). Prior to the development of PLDs, digital circuits were constructed in various scales of integrated circuit logic, such as small scale integration (SSI) and medium scale integration (MSI) devices. These devices contained logic gates and other digital circuits. The functions were determined at the time of manufacture and could not be changed. This necessitated the manufacture of a large number of device types, requiring shelves full of data books just to describe them. Also, if a designer wanted a device with a particular function that was not in a manufacturer’s list of offerings, he or she was forced to make a circuit that used multiple devices, some of which might contain functions neither wanted nor needed, thus wasting circuit board space and design time.

Programmable logic provides a solution to these problems. A PLD is supplied to the user with no logic function programmed in at all. It is up to the designer to make the PLD perform in whatever way a design requires; only those functions required by the design need be programmed. Since several functions can usually be combined in the design and programmed onto a single chip, the package count and required board space can be reduced as well. Also, if a design needs to be changed, a PLD can be reprogrammed with the new design information, often without removing it from the circuit.

PLD is a generic term. There is a wide variety of PLD types, including PAL (programmable array logic), GAL (generic array logic), EPLD (erasable PLD), CPLD (complex PLD), FPGA (field-programmable gate array), as well as several others. We will be focussing on CPLDs as a representative type of PLD. Although terminology varies somewhat throughout the industry, we will use the term CPLD to mean a device with several programmable sections that are connected internally. In effect, a CPLD is several interconnected PLDs on a single chip. This structure is not apparent to the user and doesn’t really concern us at this time, except as background information. We will look at the structure of PALs, GALs, and CPLDs in Chapter 8. We will use the term “PLD” when we are referring to a generic device and “CPLD” as a more specific type of PLD.

A complication in the use of programmable logic is that we must use specialized computer software to design and program our circuit. Initially, this might seem as though we are adding another level of work to the design, but when these computer techniques are mastered, it shortens the design process greatly and yields a level of flexibility not otherwise available.