Virtuoso Schematic Composer User Guide

Understanding Connectivity and Naming Conventions

For example, to connect two single-bit nets called NET1 and NET2 with a patchcord, a connection expression of 0 is sufficient.

Note: Only one of the nets can be connected to a schematic pin (I/O pin). Also, in the schematic editor, you cannot connect an input pin to an output pin even though you use a patchcord in the middle.

Inherited Connections

If you have a need to change the value of a global signal in your design, you can do so without recreating a complete hierarchical branch. You can build one library containing components potentially requiring different power and ground connections in different parts of a design.

This is referred to as an inherited connection.

Inherited connections let you selectively override global signals in designs originated in the Virtuoso® Schematic Composer. To have this override information available to other Cadence® tools across the design flow, the override information is communicated to the software by means of net expressions and a class of properties called netSet properties.

Inherited connections is an extension to the connectivity model that allows you to create special global signals and override their names for selected branches of the design hierarchy. This flexibility allows you to use

■Multiple power supplies in a design

■Overridable substrate connections

■Parameterized power and ground symbols

The inherited connections feature is recognized by many tools throughout the IC design flow. To learn about using inherited connections and net expressions with various Cadence tools in the design flow, refer to theInherited Connections Flow Guide.

This section describes the following information about inherited connections:

■Inherited Connections in a Hierarchy on page 116

■Defining Inherited Connections on page 117

■The Syntax of an Inherited Net Expression on page 118

■How Net Expressions Evaluate on page 118

■Sample Net Expression Library on page 121

■Inherited Connections Restrictions on page 121

Virtuoso Schematic Composer User Guide

Understanding Connectivity and Naming Conventions

■Analyzing Net Expression Property Names and Evaluated Names on page 122

Virtuoso Schematic Composer User Guide

Understanding Connectivity and Naming Conventions

Inherited Connections in a Hierarchy

You use inherited connections to selectively override global signals within your design.

Consider the following example and explanation:

The high-level schematic shows five instances:I1, I2, I3, I4, and I5. Each instance represents a portion of the design, each of which eventually references the inverter shown in the lower-level schematic.

Virtuoso Schematic Composer User Guide

Understanding Connectivity and Naming Conventions

In the inverter schematic, the power and ground wires are defined using the net expressions

[@power:%:vdd!] and [@gnd:%:gnd!], respectively. By default, all inverter pmos transistors are connected to vdd! and all nmos transistors are connected to gnd!.

In the high-level schematic, all the inverter pmos transistors below instance I2 of cellB are to use 3V! as the power supply, and the inverters in instance I3 of cellC are to use analogVdd.

To selectively override the default global signal vdd!, create a netSet property on instance I2 named power with the value 3V! and a netSet property on instance I3 named power with the value analogVdd. Notice that the inverter pmos transistors below instances I1, I4, and I5 are still connected to vdd!.

In other words, you place a netSet property on an instance representing the branch of hierarchy where it is to be applied. You can create the netSet property on any instances at any level above the cellviews with net expressions. For example, if a large hierarchical design has seven levels of hierarchy, you can place a netSet property power = 3V! on an I2 instance in the top-level schematic. This affects all the logic below instance I2 all the way to the bottom in all cellviews that contain a net expression, such as [@power:%:vdd!]. All cellviews that contain this net expression would use 3V! instead of vdd! for that branch of the design.

However, if on a lower-level cellview there was an I7 instance with a netSet property power = 2V!, then 2V! would always be used below the I7 instance.

Defining Inherited Connections

In the schematic composer, you define an inherited connection by adding a net expression label to either a wire or a pin. A net expression defines the default global signal name for the connection and the name of a property that can be used to override that default global signal name.