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Virtuoso Schematic Composer User Guide

Checking Designs

Setting the Check Options

Before you run the checks listed above, you can set options and rules using these commands:

Options – Check

Sets options to be run when you choose Design – Check and Save, Check – Current

Cellview, or Check – Hierarchy.

Options – Check Rules Setup

Sets the severity levels for checking logical, physical, name, and various other rules.

Note: Check and Check Rules Setup are accessible from both the Options menu and the

Check menu.

Setting User Preferences

To set user preferences, do the following:

1. Choose Options – Check.

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The Schematic Check Options form appears.

2.Specify the options you want to apply to your check.

3.Click OK.

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Setting Schematic Rule Checks

The Setup Schematic Rules Checks form lets you set the rules for running the SRC. Once you set these rules and SRC is enabled on the Schematic Check Options form, you can use any one of the following Check commands to run SRC checks: Design – Check and Save,

Check – Current Cellview, and Check – Hierarchy.

To set the rules for running the SRC, do the following:

1.Choose Options – Check Rules Setup.

The Setup Schematic Rules Checks form appears.

2.Set the Packaged Checks cyclic field to a specified predefined check.

The items listed in the Packaged Checks cyclic field are defined by the schSRCPackagedChecks environment variable. Packaged checks are a means of setting a set of severities using a single selection.

3.Set the severity levels for the following rules:

Logical checks the high-level connectivity data.

Physical checks for unconnected wires, offset labels, and overlapping instances.

Name checks for syntax and collisions for the Cadence VHDL verification tool or the Verilog® -XL simulator.

Inherited Connections checks existing or missing inherited connections.

AMS checks analog mixed signal netlisting checks.

4.Click OK.

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Logical Checks

Description of Logical checks

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Physical Checks

Description of Physical checks

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Name Checks

Description of Name checks

The following specifics apply to this form:

Connection By Name field. To run this check on a net marked as being connected by name, set the severity level to error. If your design has errors after checking it, you can highlight all wire segments for that net by choosing Edit – Search – Find and searching

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on that net name. Your design will show you which net is disjointed and where you need to add wire segments.

Text fieldsInstance Name Expression, Pin Name Expression, and Net Name

Expression. To use these fields, set the corresponding syntax severity level to either warning or error. In the text fields, use the regular expression syntax as documented in the UNIX man pages for the ed 1 command. If a given instance, pin, or net name matches the specified regular expression, an appropriate message is reported:

pin name "name" does not match expression "regular expression"

You can precede the expression in these text fields with an exclamation point (! ) to report names that do not match a specified regular expression. The message takes this form:

net name "name" does not match expression "regular expression"

If these text fields consist of more than one signal or bundle, the name check is applied only to the base name portion of the name.

Inherited Connections Checks

Description of Inherited Connections checks

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