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Virtuoso Schematic Composer User Guide

Customizing the Schematic Composer

load("local_dir/schConfig.il")

To load the configuration file for every session, do the following:

Add the following command to your .cdsinit file:

load("local_dir/schConfig.il")

Loading the local configuration file takes precedence over loading the default configuration

file that resides in your installation directory.

Customizing Global Editor Variables for Form Fields

These IL variables describe the “indirection map” used by the schematic editor and symbol editor. You can customize these public global SKILL variables, which relate directly to the form field settings. These variables are stored in theschConfig.il file.

To edit these variables, you need to open the configuration file.

The following tables describe variables for customizing form fields.

Schematic Editor Variables

Schematic Form Field Description

Variable Name

 

 

block edge to pin type and direction

schBlockPinAttrs

block sizes and samples

schBlockTemplate

schematicSymbol views exclusion

schCycleViewNameExclusionList

schematic pin type

schPinMasters

default schematic plot template file

schPlotTemplate

edit properties user section

schPropertiesFilter

severity and value check

schSRCPackagedChecks

property name list selection

schSelPropertyNameList

sheet border sizes and types

schSheetMasters

simulation display format

schSimProbeMasters

view translation to and from

schViewMasters

view translation options function

schViewMastersOptionFunc

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Customizing the Schematic Composer

Schematic Form Field Description

Variable Name

 

 

pin cross reference format

schZoneFormatString

pin cross reference format

schZoneFormatValue

 

 

Symbol Editor Variables

Symbol Form Field Description

Variable Name

 

 

symbol label attributes

schSymbolLabelChoices

symbol pin direction and type

schSymbolPinMasters

 

 

Symbol Generation (tsg) Variables

Symbol Form Field Description

Variable Name

 

 

pin connection type

tsgConnectorMasters

symbol pin graphic characteristics

tsgPinGraphicMasters

default tsgTemplateType

tsgTemplateMasters

 

 

HDL (Verilog, SpectreHDL, and VerilogA) Variables

Symbol Form Field Description

Variable Name

 

 

enables/disables cross-view checking or checks

schHdlCrossViewCheck

views against edited view

 

specified set of views to check

schHdlCrossViewString

controls editing and processing

schHdlEditAfterError

port output type

schHdlNetToInoutPort

port input type

schHdlNetToInputPort

turns the mixed text-graphics feature on and off

schHdlNoHierarchy

controls HDL printing

schHdlPrintCommand

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Customizing the Schematic Composer

configures the characteristics of symbols built by

schHdlUpdateSymbolAfterEdit

the text-to-symbol generator (TSG)

 

prints out diagnostic messages while the Verilog®

schHdlVerbose

text is parsed and processed

 

 

 

AMS Netlisting Variables

You can set severities for the following AMS checks:

Form Field Description

Variable Name

 

 

illegal identifiers

allowLegalIdentifiers

name collisions

allowNameCollisions

conflicting bus ranges

allowDeviantBuses

sparse buses

allowSparseBuses

 

 

Block Pin Direction Rule Variable

schBlockPinAttrs

Sets the pin direction implied by connecting to a specific edge of a block. This IL structure describes the mapping of the block edge to pin type and direction. This map is used by the schematic user interface to provide a simplified approach for selecting the pin direction implied by connecting a wire to a specific edge of a block.

To edit this variable, you need to open the configuration file. You can add or delete choices any time before you execute any schematic functionality in an interactive session.

Syntax

list( PIN_TYPE

list( EDGE_DIRECTION TERMINAL_DIRECTION ) list( EDGE_DIRECTION TERMINAL_DIRECTION )

...

)

)

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Arguments

 

PIN_TYPE

The name of the pin “type”

EDGE_DIRECTION

left, right, bottom, top

TERMINAL_DIRECTION

The CDBA terminal direction

PIN_TYPE and TERMINAL_DIRECTION uniquely identify a pin master in the schSymbolPinMasters map.

Example

schBlockPinAttrs = list( "block"

list("left" "input") list("right" "output") list("bottom" "inputOutput") list("top" "inputOutput")

)

Block Sample Sizes Variable

schBlockTemplate

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Sets the block sample sizes during top-down block creation.

Add Block

To edit this variable, you need to open the configuration file. You can add or delete choices any time before you execute any schematic functionality in an interactive session.

Put choices here for the block sample names, sizes, and labels that are used during block creation.

Standard Structure

list(

list( BLOCK_NAME BLOCK_SIZE list(

LABEL

LABEL

...

)

)

...

)

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