Chapter 10 High-Precision Timing (Counters/Timers)

In frame 1 of the sequence, the counters are set up for different counting modes. counter 0 is set up to generate a timebase using the ICTR Timebase Generator VI. counter 1 is set up to output a single low pulse using the ICTR Control VI. counter 2 is set up to output a pulse train using the ICTR Timebase Generator VI.

In frame 2 of the sequence, a delay occurs so that the finite pulse train has time to complete before the example can be run again. This is useful if the example is used as a subVI where it may get called over and over.

Counting Operations When All Your Counters Are Used

The DAQ-STC and Am9513 have counting operations available even when all the counters have been used.

DAQ-STC devices feature a FREQ_OUT pin, and Am9513 devices feature an FOUT pin. You can generate a 0.5 duty cycle square wave on these pins without using any of the available counters.

The CTR Control VI, available on the Functions»Data Acquisition» Counter»Advanced Counter»AM9513 & Compatibility palette, enables and disables the FOUT signal and sets the square wave frequency. The square wave frequency is defined by the FOUT timebase signal divided by the FOUT divisor.

Note If you are using NI-DAQ 6.5 or higher, National Instruments recommends you use the new Advanced Counter VIs, such as Counter Group Config, Counter Get Attribute, Counter Set Attribute, Counter Buffer Read, and Counter Control.

You also can refer to the Generate Pulse Train on FREQ_OUT VI in the examples\daq\counter\DAQ-STC.llb or the Generate Pulse Train on FOUT VI in the examples\daq\counter\Am9513.llb for examples of how to generate a pulse train on these outputs.