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- •Model Parameters
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- •Simulink Identifier
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- •Model Advisor Checks
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- •See Also
- •Identify unconnected lines, input ports, and output ports
- •Description
- •Results and Recommended Actions
- •Capabilities and Limitations
- •Tips
- •See Also
- •Check root model Inport block specifications
- •Description
- •Results and Recommended Actions
- •See Also
- •Check optimization settings
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Description
- •Results and Recommended Actions
- •See Also
- •Check for implicit signal resolution
- •Description
- •Results and Recommended Actions
- •See Also
- •Check for optimal bus virtuality
- •Description
- •Results and Recommended Actions
- •Capabilities and Limitations
- •See Also
- •Description
- •Results and Recommended Actions
- •Capabilities and Limitations
- •See Also
- •Identify disabled library links
- •Description
- •Results and Recommended Actions
- •Capabilities and Limitations
- •Tips
- •See Also
- •Identify parameterized library links
- •Description
- •Results and Recommended Actions
- •Capabilities and Limitations
- •Tips
- •See Also
- •Identify unresolved library links
- •Description
- •Results and Recommended Actions
- •Capabilities and Limitations
- •See Also
- •Results and Recommended Actions
- •Capabilities and Limitations
- •See Also
- •Results and Recommended Actions
- •Capabilities and Limitations
- •See Also
- •Check usage of function-call connections
- •Description
- •Results and Recommended Actions
- •See Also
- •Check signal logging save format
- •Description
- •Results and Recommended Actions
- •See Also
- •Description
- •Results and Recommended Actions
- •See Also
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Check data store block sample times for modeling errors
- •Description
- •Results and Recommended Actions
- •See Also
- •Check for potential ordering issues involving data store access
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Check for partial structure parameter usage with bus signals
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Check for calls to slDataTypeAndScale
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Check for proper bus usage
- •Description
- •Results and Recommended Actions
- •Action Results
- •Tips
- •See Also
- •Description
- •Results and Recommended Actions
- •See Also
- •Description
- •Results and Recommended Actions
- •See Also
- •Check for proper Merge block usage
- •Description
- •Input Parameters
- •Results and Recommended Actions
- •See Also
- •Description
- •Results and Recommended Actions
- •Action Results
- •See Also
- •Check for non-continuous signals driving derivative ports
- •Description
- •Results and Recommended Actions
- •See Also
- •Runtime diagnostics for S-functions
- •Description
- •Results and Recommended Actions
- •See Also
- •Check file for foreign characters
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Check model for known block upgrade issues
- •Description
- •Results and Recommended Actions
- •Action Results
- •See Also
- •Description
- •Results and Recommended Actions
- •Action Results
- •See Also
- •Check that the model is saved in SLX format
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Check Model History properties
- •Description
- •Results and Recommended Actions
- •See Also
- •Analyze model hierarchy for upgrade issues
- •Description
- •Results and Recommended Actions
- •Tips
- •See Also
- •Description
- •Results and Recommended Actions
- •See Also
- •Simulink Performance Advisor Checks
- •Simulink Performance Advisor Check Overview
- •See Also
- •Baseline
- •See Also
- •Check Preupdate Items
- •See Also
- •Checks that need Update Diagram
- •See Also
- •Checks that require simulation to run
- •See Also
- •Check Accelerator Settings
- •See Also
- •Create Baseline
- •See Also
- •Identify resource intensive diagnostic settings
- •See Also
- •Check optimization settings
- •See Also
- •Identify inefficient lookup table blocks
- •See Also
- •Identify Interpreted MATLAB Function blocks
- •See Also
- •Check MATLAB Function block debug settings
- •See Also
- •Check Stateflow block debug settings
- •See Also
- •Identify simulation target settings
- •See Also
- •Check model reference rebuild setting
- •See Also
- •Check Model Reference parallel build
- •See Also
- •Check solver type selection
- •See Also
- •Select normal or accelerator simulation mode
- •See Also
- •Simulink Limits
- •Maximum Size Limits of Simulink Models
- •Index
- •Filter Structures and Filter Coefficients
- •Valid Initial States
- •Number of Delay Elements (Filter States)
- •Frame-Based Processing
- •Sample-Based Processing
- •Valid Initial States
- •Frame-Based Processing
- •Sample-Based Processing
- •Model Parameters in Alphabetical Order
- •Common Block Parameters
- •Continuous Library Block Parameters
- •Discontinuities Library Block Parameters
- •Discrete Library Block Parameters
- •Logic and Bit Operations Library Block Parameters
- •Lookup Tables Block Parameters
- •Math Operations Library Block Parameters
- •Model Verification Library Block Parameters
- •Model-Wide Utilities Library Block Parameters
- •Ports & Subsystems Library Block Parameters
- •Signal Attributes Library Block Parameters
- •Signal Routing Library Block Parameters
- •Sinks Library Block Parameters
- •Sources Library Block Parameters
- •User-Defined Functions Library Block Parameters
- •Additional Discrete Block Library Parameters
- •Additional Math: Increment - Decrement Block Parameters
- •Mask Parameters
10 Model Advisor Checks
Check for proper bus usage
Identify Mux blocks used as a bus creator and bus signal that Simulink treats as a vector.
Description
Models should not contain bus signals that Simulink software implicitly converts to vectors. Instead, either insert a Bus to Vector conversion block between the bus signal and the block input port that it feeds, or use the
Simulink.BlockDiagram.addBusToVector command.
Results and Recommended Actions
|
Condition |
Recommended Action |
|
|
Model uses Mux blocks |
Replace Mux blocks with Bus Creator blocks. |
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|
to create bus signals. |
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|
Model is not configured |
In the Configuration Parameters dialog box, on |
|
|
to identify Mux blocks |
the Diagnostics > Connectivity pane, set Mux |
|
|
used as bus creators. |
blocks used to create bus signals to error. |
|
|
Bus signals are implicitly |
Use Simulink.BlockDiagram.addBusToVector |
|
|
converted to vectors. |
or insert a Bus to Vector block. |
|
|
Model is not configured |
In the Configuration Parameters dialog box, on |
|
|
to identify bus signals |
the Diagnostics > Connectivity pane, set Bus |
|
|
Simulink treats as |
signal treated as vector to error. |
|
|
vectors. |
|
|
Action Results
Clicking Modify causes one of the following:
•Mux blocks are replaced by Bus Creator blocks.
•Bus to Vector blocks are inserted at the inports of blocks that implicitly convert bus signals to vectors.
10-32
Simulink® Checks
Tips
•The Bus to Vector conversion block resides in the Simulink/Signal Attributes library.
•Run this check before running Check consistency of initialization parameters for Outport and Merge blocks.
•The “Non-bus signals treated as bus signals” diagnostic detects when Simulink implicitly converts a non-bus signal to a bus signal to support connecting the signal to a Bus Assignment or Bus Selector block.
This diagnostic is in the Configuration Parameters dialog box, on the
Diagnostics> Connectivity pane.
•Using a Mux block to create a virtual bus does not support strong type checking and increases the likelihood of run-time errors. In new applications, do not use Mux blocks to create bus signals. Consider upgrading existing applications to that use of Mux blocks.
-Simulink generates a warning when you load a model created in a release prior to R2010a, if that model contains a Mux block to create a bus signal. For new models, Simulink generates an error.
See Also
•“Avoid Mux/Bus Mixtures”
•Bus to Vector block
•“Mux blocks used to create bus signals”
•“Bus signal treated as vector”
•“Check consistency of initialization parameters for Outport and Merge blocks” on page 10-37
•Simulink.BlockDiagram.addBusToVector
10-33
10 Model Advisor Checks
Check for potentially delayed function-call subsystem return values
Identify function-call return values that might be delayed because Simulink software inserted an implicit Signal Conversion block.
Description
So that signals reside in contiguous memory, Simulink software can automatically insert an implicit Signal Conversion block in front of function-call initiator block input ports. This can result in a one-step delay in returning signal values from calling function-call subsystems. The delay can be avoided by ensuring the signal originates from a signal block within the function-call system. Or, if the delay is acceptable, insert a Unit Delay block in front of the affected input ports.
Results and Recommended Actions
|
Condition |
Recommended Action |
|
|
The listed block input ports could have an |
Decide if a one-step delay |
|
|
implicit Signal Conversion block. |
in returning signal values |
|
|
|
is acceptable for the listed |
|
|
|
signals. |
|
|
|
• If the delay is not |
|
|
|
acceptable, rework |
|
|
|
your model so that the |
|
|
|
input signal originates |
|
|
|
from within the calling |
|
|
|
subsystem. |
|
|
|
• If the delay is acceptable, |
|
|
|
insert a Unit Delay block |
|
|
|
in front of each listed input |
|
|
|
port. |
|
See Also
Signal Conversion block
Unit Delay block
10-34
Simulink® Checks
Identify block output signals with continuous sample time and non-floating point data type
Find continuous sample time, non-floating-point output signals.
Description
Non-floating-point signals might not represent continuous variables without loss of information.
Results and Recommended Actions
|
Condition |
Recommended Action |
|
|
Signals with continuous sample times have |
On the identified signals, |
|
|
a non-floating-point data type. |
either change the sample |
|
|
|
time to be discrete or |
|
|
|
fixed-in-minor-step ([0 1]). |
|
See Also
“What Is Sample Time?”.
10-35