Simulink®
Reference
R2012b
How to Contact MathWorks
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www.mathworks.com/contact_TS.html Technical Support |
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Simulink® Reference
© COPYRIGHT 2002–2012 by The MathWorks, Inc.
The software described in this document is furnished under a license agreement. The software may be used or copied only under the terms of the license agreement. No part of this manual may be photocopied or reproduced in any form without prior written consent from The MathWorks, Inc.
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Revision History |
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July 2002 |
Online only |
Revised for Simulink 5 (Release 13) |
April 2003 |
Online only |
Revised for Simulink 5.1 (Release 13SP1) |
April 2004 |
Online only |
Revised for Simulink 5.1.1 (Release 13SP1+) |
June 2004 |
Online only |
Revised for Simulink 6 (Release 14) |
October 2004 |
Online only |
Revised for Simulink 6.1 (Release 14SP1) |
March 2005 |
Online only |
Revised for Simulink 6.2 (Release 14SP2) |
September 2005 |
Online only |
Revised for Simulink 6.3 (Release 14SP3) |
March 2006 |
Online only |
Revised for Simulink 6.4 (Release 2006a) |
September 2006 |
Online only |
Revised for Simulink 6.5 (Release 2006b) |
March 2007 |
Online only |
Revised for Simulink 6.6 (Release 2007a) |
September 2007 |
Online only |
Revised for Simulink 7.0 (Release 2007b) |
March 2008 |
Online only |
Revised for Simulink 7.1 (Release 2008a) |
October 2008 |
Online only |
Revised for Simulink 7.2 (Release 2008b) |
March 2009 |
Online only |
Revised for Simulink 7.3 (Release 2009a) |
September 2009 |
Online only |
Revised for Simulink 7.4 (Release 2009b) |
March 2010 |
Online only |
Revised for Simulink 7.5 (Release 2010a) |
September 2010 |
Online only |
Revised for Simulink 7.6 (Release 2010b) |
April 2011 |
Online only |
Revised for Simulink 7.7 (Release 2011a) |
September 2011 |
Online only |
Revised for Simulink 7.8 (Release 2011b) |
March 2012 |
Online only |
Revised for Simulink 7.9 (Release 2012a) |
September 2012 |
Online only |
Revised for Simulink 8.0 (Release 2012b) |
Contents
1 |
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Block Reference |
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Commonly Used |
1-2 |
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Continuous . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . 1-4 |
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Discontinuities . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-5 |
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Discrete . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-6 |
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Logic and Bit Operations . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-8 |
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Lookup Tables . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-10 |
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Math Operations . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-11 |
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Model Verification . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-13 |
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Model-Wide Utilities . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-14 |
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Ports & Subsystems . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-15 |
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Signal Attributes . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-16 |
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Signal Routing . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-17 |
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Sinks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-19 |
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Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-20 |
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User-Defined Functions . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . 1-22 |
v
Additional Math & Discrete . . . . . . . . . . . . . . . . . . . . . . . . . |
1-23 |
Additional Discrete . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
1-23 |
Additional Math: Increment — Decrement . . . . . . . . . . . . . |
1-23 |
Run on Target Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . |
1-24 |
Target for Use with Arduino Hardware . . . . . . . . . . . . . . . . |
1-24 |
Target for Use with BeagleBoard Hardware . . . . . . . . . . . . |
1-25 |
Target for Use with LEGO MINDSTORMS NXT |
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Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
1-26 |
Blocks — Alphabetical List
2
3 |
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Function Reference |
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Model Construction |
3-2 |
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Simulation . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . . . . 3-7 |
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Linearization and Trimming . . . . . . |
. . . . . . . . . . . . . . . . . . 3-10 |
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Data Type . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . . . 3-11 |
vi Contents
Functions — Alphabetical List
4
Mask Icon Drawing Commands
5
Simulink Debugger Commands
6
Simulink Classes
7
Model and Block Parameters
8
Model Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8-2 |
About Model Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8-2 |
Examples of Setting Model Parameters . . . . . . . . . . . . . . . . |
8-95 |
Common Block Parameters . . . . . . . . . . . . . . . . . . . . . . . . . |
8-96 |
About Common Block Parameters . . . . . . . . . . . . . . . . . . . . |
8-96 |
Examples of Setting Block Parameters . . . . . . . . . . . . . . . . |
8-107 |
Block-Specific Parameters . . . . . . . . . . . . . . . . . . . . . . . . . |
8-109 |
Mask Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8-259 |
About Mask Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8-259 |
Notes on Mask Parameter Storage . . . . . . . . . . . . . . . . . . . |
8-265 |
vii
Simulink Identifier
9
Simulink Identifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
9-2 |
10 |
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Model Advisor Checks |
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Simulink Checks |
10-2 |
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Simulink Check Overview . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-4 |
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Identify unconnected lines, input ports, and output |
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ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-5 |
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Check root model Inport block specifications . . . . . . . . . . . |
10-6 |
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Check optimization settings . . . . . . . . . . . . . . . . . . . . . . . . . |
10-7 |
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Check for parameter tunability information ignored for |
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referenced models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-10 |
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Check for implicit signal resolution . . . . . . . . . . . . . . . . . . . |
10-11 |
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Check for optimal bus virtuality . . . . . . . . . . . . . . . . . . . . . |
10-12 |
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Check for Discrete-Time Integrator blocks with initial |
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condition uncertainty . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-13 |
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Identify disabled library links . . . . . . . . . . . . . . . . . . . . . . . |
10-14 |
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Identify parameterized library links . . . . . . . . . . . . . . . . . . |
10-15 |
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Identify unresolved library links . . . . . . . . . . . . . . . . . . . . . |
10-16 |
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Identify model reference variants and variant subsystems |
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that override variant choice . . . . . . . . . . . . . . . . . . . . . . . |
10-17 |
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Identify configurable subsystem blocks for converting to |
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variant subsystem blocks . . . . . . . . . . . . . . . . . . . . . . . . . |
10-18 |
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Check usage of function-call connections . . . . . . . . . . . . . . . |
10-18 |
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Check signal logging save format . . . . . . . . . . . . . . . . . . . . . |
10-19 |
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Check Data Store Memory blocks for multitasking, strong |
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typing, and shadowing issues . . . . . . . . . . . . . . . . . . . . . . |
10-21 |
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Check if read/write diagnostics are enabled for data store |
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blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-23 |
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Check data store block sample times for modeling errors . . |
10-25 |
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Check for potential ordering issues involving data store |
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access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-26 |
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Check for partial structure parameter usage with bus |
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signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-28 |
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Check for calls to slDataTypeAndScale . . . . . . . . . . . . . . . . |
10-30 |
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Check for proper bus usage . . . . . . . . . . . . . . . . . . . . . . . . . |
10-32 |
viii Contents
Check for potentially delayed function-call subsystem |
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return values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-34 |
Identify block output signals with continuous sample time |
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and non-floating point data type . . . . . . . . . . . . . . . . . . . |
10-35 |
Check for proper Merge block usage . . . . . . . . . . . . . . . . . . |
10-36 |
Check consistency of initialization parameters for Outport |
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and Merge blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-37 |
Check for non-continuous signals driving derivative |
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ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-55 |
Runtime diagnostics for S-functions . . . . . . . . . . . . . . . . . . |
10-57 |
Check file for foreign characters . . . . . . . . . . . . . . . . . . . . . |
10-59 |
Check model for known block upgrade issues . . . . . . . . . . . |
10-64 |
Check model for known block upgrade issues requiring |
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compile time information . . . . . . . . . . . . . . . . . . . . . . . . . |
10-65 |
Check that the model is saved in SLX format . . . . . . . . . . . |
10-68 |
Check Model History properties . . . . . . . . . . . . . . . . . . . . . . |
10-70 |
Analyze model hierarchy for upgrade issues . . . . . . . . . . . . |
10-72 |
Check and update masked blocks in library to use promoted |
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parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
10-74 |
Performance Advisor Checks
11
Simulink Performance Advisor Checks . . . . . . . . . . . . . . |
11-2 |
Simulink Performance Advisor Check Overview . . . . . . . . |
11-2 |
Baseline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
11-3 |
Check Preupdate Items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
11-3 |
Checks that need Update Diagram . . . . . . . . . . . . . . . . . . . |
11-3 |
Checks that require simulation to run . . . . . . . . . . . . . . . . . |
11-3 |
Check Accelerator Settings . . . . . . . . . . . . . . . . . . . . . . . . . . |
11-3 |
Create Baseline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
11-4 |
Identify resource intensive diagnostic settings . . . . . . . . . . |
11-4 |
Check optimization settings . . . . . . . . . . . . . . . . . . . . . . . . . |
11-4 |
Identify inefficient lookup table blocks . . . . . . . . . . . . . . . . |
11-5 |
Identify Interpreted MATLAB Function blocks . . . . . . . . . |
11-5 |
Check MATLAB Function block debug settings . . . . . . . . . |
11-5 |
Check Stateflow block debug settings . . . . . . . . . . . . . . . . . |
11-5 |
Identify simulation target settings . . . . . . . . . . . . . . . . . . . |
11-6 |
Check model reference rebuild setting . . . . . . . . . . . . . . . . . |
11-6 |
Check Model Reference parallel build . . . . . . . . . . . . . . . . . |
11-6 |
Check solver type selection . . . . . . . . . . . . . . . . . . . . . . . . . . |
11-8 |
ix
Select normal or accelerator simulation mode . . . . . . . . . . |
11-9 |
Simulink Limits
12
Maximum Size Limits of Simulink Models . . . . . . . . . . . |
12-2 |
Index
x Contents
1
Block Reference
Commonly Used (p. 1-2)
Continuous (p. 1-4)
Discontinuities (p. 1-5)
Discrete (p. 1-6)
Logic and Bit Operations (p. 1-8)
Lookup Tables (p. 1-10)
Math Operations (p. 1-11)
Model Verification (p. 1-13)
Model-Wide Utilities (p. 1-14)
Ports & Subsystems (p. 1-15)
Signal Attributes (p. 1-16)
Signal Routing (p. 1-17)
Sinks (p. 1-19)
Sources (p. 1-20)
User-Defined Functions (p. 1-22)
Additional Math & Discrete (p. 1-23)
Run on Target Hardware (p. 1-24)
Commonly used blocks Define continuous states Define discontinuous states Define discrete states
Perform logic and bit operations Support lookup tables
Perform math operations Perform model verification Support model-wide operations Support ports and subsystems Support signal attributes Support signal routing
Receive output from other blocks Input to other blocks
Support custom functions
Provide additional math and discrete support
1 Block Reference
Commonly Used
Bus Creator |
Create signal bus |
Bus Selector |
Select signals from incoming bus |
Constant |
Generate constant value |
Data Type Conversion |
Convert input signal to specified |
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data type |
Demux |
Extract and output elements of |
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vector signal |
Discrete-Time Integrator |
Perform discrete-time integration or |
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accumulation of signal |
Gain |
Multiply input by constant |
Ground |
Ground unconnected input port |
Inport |
Create input port for subsystem or |
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external input |
Integrator, Integrator Limited |
Integrate signal |
Logical Operator |
Perform specified logical operation |
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on input |
Mux |
Combine several input signals into |
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vector |
Outport |
Create output port for subsystem or |
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external output |
Product |
Multiply and divide scalars and |
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nonscalars or multiply and invert |
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matrices |
Relational Operator |
Perform specified relational |
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operation on inputs |
Saturation |
Limit range of signal |
Scope and Floating Scope |
Display signals generated during |
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simulation |
1-2
Commonly Used
Subsystem, Atomic Subsystem, |
Represent system within another |
Nonvirtual Subsystem, CodeReuse |
system |
Subsystem |
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Sum, Add, Subtract, Sum of |
Add or subtract inputs |
Elements |
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Switch |
Switch output between first input |
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and third input based on value of |
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second input |
Terminator |
Terminate unconnected output port |
Unit Delay |
Delay signal one sample period |
Vector Concatenate, Matrix |
Concatenate input signals of same |
Concatenate |
data type to create contiguous output |
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signal |
1-3
1 Block Reference
Continuous
Derivative |
Output time derivative of input |
Integrator, Integrator Limited |
Integrate signal |
PID Controller |
Simulate continuousor |
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discrete-time PID controllers |
PID Controller (2 DOF) |
Simulate continuousor |
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discrete-time two-degree-of-freedom |
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PID controllers |
Second-Order Integrator, |
Integrate input signal twice |
Second-Order Integrator Limited |
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State-Space |
Implement linear state-space system |
Transfer Fcn |
Model linear system by transfer |
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function |
Transport Delay |
Delay input by given amount of time |
Variable Time Delay, Variable |
Delay input by variable amount of |
Transport Delay |
time |
Zero-Pole |
Model system by zero-pole-gain |
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transfer function |
1-4