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Data Buses

9.4Byte invariance

To access mixed-endian data structures that reside in the same memory space, the AXI protocol uses a byte-invariant endian scheme.

Byte-invariant endianness means that a byte transfer to a given address passes the eight bits of data on the same data bus wires to the same address location.

Components that have only one transfer width must have their byte lanes connected to the appropriate byte lanes of the data bus. Components that support multiple transfer widths might require a more complex interface to convert an interface that is not naturally byte-invariant.

Most little-endian components can connect directly to a byte-invariant interface. Components that support only big-endian transfers require a conversion function for byte-invariant operation.

Figure 9-4 is an example of a data structure requiring byte-invariant access. It is possible that the header information, such as the source and destination identifiers, is in little-endian format, but the payload is a big-endian byte stream.

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Data items

 

 

 

 

 

 

 

 

 

 

Payload

 

 

 

 

 

 

 

 

 

 

 

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Payload

 

 

 

 

 

 

 

 

 

 

Figure 9-4 Example mixed-endian data structure

Byte invariance ensures that little-endian access to parts of the header information does not corrupt other big-endian data within the structure.

ARM IHI 0022B

Copyright © 2003, 2004 ARM Limited. All rights reserved.

9-5

Data Buses

9-6

Copyright © 2003, 2004 ARM Limited. All rights reserved.

ARM IHI 0022B

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