metodIII

10. Why is the same orientation of antennas within one communication system so important?

II. Find in the text English equivalent to the following Ukrainian words and word combinations and write them out.

(Радіо) передавач, (радіо) приймач, змінний струм, провід, наводити електричний струм, виходячи з, випромінювати, сотовий (стільниковий) телефон, зовнішній, втрати, нуль, частково, зникати, забезпечити, напрямок, навколишнє середовище, відбивання (сигналу).

III. Give definition of the following words:

Conductor, direct current, alternating current, cellular phone, battery, antenna gain.

IV. Agree or disagree with the statements given below. The following phrases may be helpful:

Certain, sure, indeed, of course, it goes without saying, as far as I know…

1.An antenna can carry any kind of electric current.

2.The longer the wire of antenna the more the distance of radiation.

3.One connection point is enough for all antennas.

4.Coaxial cable is used to avoid mistuning the antenna.

5.Radiation is maximum in the direction parallel to a wire.

6.Tilted whip is the ideal antenna.

7.Differently polarized antennas can’t communicate effectively.

8.Both horizontal and vertical polarized signals can be present in the real environment.

V. Open the brackets and translate the words into English:

1.An alternating current flowing through a conductor induces an electric current through another wire (поруч).

2.(Сусідство) to fire is dangerous.

3.Short circuit can result in (збій настройки) of the device.

4.The antenna and transmitter are connected with (простий) wire.

5.The higher (коефіцієнт підсилення антени), the better sound quality.

6.(Поперечне) radiation is maximum.

VI. Match English terms with their definitions and learn them by heart.

Over – черезмірно; under – недостатньо; mis – неправильно; omni – всебічність.

Over-: overcharge v, overload v, overpay v, overvalue v, overproduction n. Under-: undervalue v, underpay v, underproduction n, undergraduate n. Mis-: mishear v, misinform v, misinterpret v, mistune v, misunderstand v. Omni-: omnicompetent a, omnipresence n, omniscience n, omnidirectional a.

II. Give nouns corresponding to the following:

To generate, to transmit, to receive, to tune, to radiate, to perform, to polarize, to apply, to carry, to refer, to absorb, to test.

III. Analyze the following words. Underline the suffixes and state what part of speech they belong:

1.Carry v (переносити), carrier n, carriage n;

2.Relate v (відноситись), relative a, relationship n, relativity n;

3.Safe a (безпечний, надійний), safe n, safety n, safely adv;

4.Resist v (опиратись), resistant a, resistency;

5.Break v (руйнувати), breaker n, breakage n, breakable a;

6.Lead v (вести), leader n, leadership n;

7.Weak a (слабкий), weaken v, weakling n, weakness n.

Grammar Structure

Subjunctive Mood in Scientific English

I. Translate the following sentence with Subjunctive Mood.

1.To mount an antenna it is necessary that nearby objects should be taken into account.

2.After the design of the device is completed, it is important that it be checked experimentally.

3.It is desirable that the antennas be oriented in the same way.

4.They reduced the voltage lest the current should be too strong.

5.But for the breakage they would have succeeded in getting the result.

6.They listened to the report as if they were greatly interested in the topic.

7.Modern engineering demands that the range of transistors be expended.

8.It is suggested that the data be classified before starting the experiment.

9.Had you taken all the safely measures, the machine would not be broken.

10.Whatever the size of a condenser be the amount of charge to be stored depends on its surface.

II.Write the questions to which the following sentence are possible answers:

1.An antenna must be matched and tuned to the transmitter and receiver.

2.The most common examples of ”whip” antenna are found on automobiles.

3.The whip and groundplane combine to form a complete circuit.

4.An antenna is affected by nearly objects.

5.The best way to fine tune of remote transmitter antenna is by using the transmitter itself.

6.A vertical whip is ideal for communication in any direction except straight up.

7.Good antenna design is required to realize good range performance.

8.Radiation is maximum when it is perpendicular do a wire.

9.The groundplane of a dipole is replaced with another quarterwave wire.

10.Coaxial cable to connect to an external antenna should be used in order to avoid mistuning.

III.Rewrite the following sentence in the passive.

1.We can define antenna as a conductor carrying pulsing or alternating current.

2.Such a current will generate an electromagnetic field around the wire.

3.Pulsing and varying electric current will cause proper changing in electromagnetic field.

4.Nearby object usually affect antennas.

5.You can change antennas measurements wrapping your hand around the cable.

6.We achieve maximum radiation power tuning the antenna.

7.Transmission lines transfer power from one place to another with minimum

loss.

8.Low gain shows that antenna radiates poorly.

9.In a dipole another quarterwave wire replaces groundplane.

Scientific Communication

I. Read the text without a dictionary and give a suitable title for it. Make a short written summary.

Cable TV network is a system designed to deliver broadcast television signals efficiently to subscribers’ homes. To ensure that consumers could obtain cable service with the same TV sets they use to receive over-the-air broadcast TV signals, cable operators recreate a portion of the over-the-air radio frequency (RF) spectrum within a sealed coaxial cable line. CATV is comprised of multiple TV channels (and usually radio channels also) transmitted over a single cable with each channel occupying a different frequency range. Several video channels (tens of them) may be carried over a single cable. Cable TV is a transmission system can be viewed as a broadband cabling system that supports transmission of multiple services over a single cable by dividing the bandwidth into separate frequencies, with each frequency assigned to a different service. Each TV channel (or other service) uses a different frequency range. Cable TV signals occupy the frequencies that are used for public service (police and fire, etc.) and for this reason the cable TV companies are required by law to maintain their cables to prevent leakage, so they do regular checks. If they find that the cable TV signal is getting outside the cable, they will take necessary action to stop it. If they find that your equipment/wiring is causing it, they will really take action, which means

disconnecting you and possibly subjecting you to other action (possibly legal consequences that can get expensive).

II. Find the parts of the text “Antennas for Low Power application” devoted to the following points and speak on them:

1.The direction of radiation.

2.Reference antenna.

3.The length of antenna.

III. Speak on the tuning of antennas. IV. Give a definition of Cable TV.

Supplementary Texts

Chips Go Vertical

Vanishingly small transistors have made Moore’s Law as much a pop culture phenomenon as a driver for the semiconductor industry. By doubling the number of transistors per microchip every two years, chip makers have given us ever more powerful PCs and electronic gadgets at prices that shrink almost as fast as transistors do. So it may come as a surprise to many that today wires, not transistors, are determining the performance and cost of microchips.

Engineers have been figuring out more efficient ways to connect transistors since the first silicon wafer was diced into chips. When he created the integrated circuit at Texas Instruments Inc., in Dallas, over 40 years ago, Jack Kilby had to overcome the so-called tyranny of numbers that engineers of his era labored under as they tried to connect individual transistors the size of pencil erasers to perform useful calculations. The more transistors they tried to use, the more wires they needed and the more power these devices consumed. Scaling up kludged-together devices so they could do useful work would have been next to impossible – too heavy, too expensive, and too hot to handle. TI’s Kilby came up with a way to integrate the elements, embedding a transistor, a capacitor, and resistors into a semiconductor material and connecting them with wire bonds to form a working integrated circuit, whereas Fairchild Semiconductor’s Jean Hoerni and Robert Noyce developed approaches for planar interconnection of transistors.

The digital revolution made possible by the IC has been racing along ever since. We’ve managed to reduce a roomful of 1960s-era computers to a tiny wisp of silicon and as a result live in a world defined by pervasive computing and constant mediated communication. With our cellphones we snap photos of our toddler taking her first steps and let Grandma see them seconds later. We store our entire music collection in MP3 format in a shirt pocket. We talk to our cars, and the GPS map in the dashboard tells us how to get where we need to go. Every day, hundreds of millions of people swap ideas, information, cash, and products over the Internet. Our telescopes show us the edge of the universe, and our robots crawl on Mars. And there doesn’t seem to be an end in sight. The latest Itanium microprocessor from Gordon Moore and Robert Noyce’s old company, Intel Corp., code-named Madison and due out this year, will pack 410 million transistors into a 374-square- millimeter area. Madison’s successor, Montecito, will include more than 1 billion transistors.

But guess what? The tyranny of numbers is back – albeit in a new and even more insidious guise. As ICs become more complex, so too does their wiring: some of today’s chips made with wires 90 nanometers wide have a mind-boggling 7 kilometers of interconnects per square centimeter. To connect an exponentially increasing number of transistors in the same footprint, wires are built in layers.

There are local wires at the lower levels of the chip, next to the transistors that are built into the chip’s silicon foundation, called a substrate. These carry signals from transistors that are relatively close to each other, within a certain circuit or functional block, say, a video decoder or chunk of dynamic random-access memory (DRAM). And there are so-called global interconnects located in the upper layers of the chip, which carry signals from transistors spaced far from each other, say, from the video decoder to the DRAM. Now, up to nine layers of wires connect transistors. Because leading-edge chips have so many interconnect layers, those wires dominate the cost of the chip, and the decision to add yet another layer has become an important one.

Beyond cost considerations, engineers are worried about performance. As semiconductor manufacturing technology progresses from one generation to the next, the time it takes for the transistor to turn on or off, or the gate delay, decreases and the chip runs faster. But global connections counteract the performance gain of these faster-switching transistors, because these wires can handle only so much speed. And in the process long interconnects consume power as unwanted capacitance, caused by all of these wires’ being packed together in such a small space.

Cosmologists theorize that the fastest way to travel from one end of the universe to another is through a wormhole, which brings distant points together. Similarly, chip designers are warming to the idea that the best way to lower capacitance, maintain signal integrity, and keep chips blazing along at ever faster multigigahertz speeds is to find a shorter distance between two points. Such minimization will happen along the z, or vertical, axis. Companies have already started to stack individual chips, or dies, to make three-dimensional ICs. As they sandwich analog, digital logic, and memory circuits, they also create the IC version of a worm-hole, called a via, a tiny tunnel they later thread the global interconnects through.

If it sounds a bit far-fetched, consider some of the leading alternatives: getting rid of the physical wire altogether and instead using light, radio waves, or microwaves for global interconnects. It may make a lot of sense to use these methods between chips, but using them to connect points on the same chip might add complexity and expense that offsets some of the gain. Still other blue-sky proposals involve nanotubes, spin-coupling, and molecular interconnects.

Such methods aimed at changing the fundamental nature of the wire interconnect won’t rescue Moore’s Law for another decade, if ever. But there are a number of other approaches to chip architectures that are being used today to increase the performance of ordinary copper wires.

Over the past year or so, semiconductor manufacturers started using a new kind of standard substance, called a low-k dielectric material, to insulate on-chip wires. This material lets them pack in more wires by reducing the capacitance between them. But at some point within the next five years, the wiring layers will fill up, and adding another wiring layer will be prohibitively expensive, unreliable, or simply impossible. So designers have come up with new ways to make the most of what they already have.

Three-dimensional chips are one of three basic strategies for getting around the interconnection conundrum. Another one is the X Architecture, promoted by the X Initiative, Mountain View, Calif. The idea is to give designers the option of using 45-degree angles to connect transistors, where the industry has relied almost exclusively on 90-degree connection routes (dubbed Manhattan layouts for their resemblance to New York City’s street grid). The addition of 45-degree angles in the global interconnect layers shortens global wire lengths and opens up some room in the global layers for more wires.

Another contender is the network-on-a-chip approach licensed to chip makers by Sonics Inc., Mountain View, Calif. The basic idea is easy to grasp: put all highbandwidth and low-latency interconnects on short wires so the longer wires in a chip will handle only the low-bandwidth, global signals that are relatively tolerant of latency. For example, the central processor of a microprocessor would have to communicate asynchronously with on-chip memoryin a message-based way, much as servers communicate with client computers using data packets.

With all of these possible solutions vying for attention and development funds, one of the most audacious ideas among them is beginning to rise above the crowd. A 3-D IC is a stack of multiple dies with many direct connections tunneling through them, dramatically reducing global interconnect lengths and increasing the number of transistors that are within one clock cycle of each other. The key to the advantage comes from allowing wires to be routed directly between and through the chips. With this approach, the maximum global-interconnect length and the average global-interconnect length both decrease by a factor equal to the square root of the number of dies being stacked. This decreases the bottleneck effect they have on the IC’s performance by about the same factor.

The idea should not be confused with 3-D packages, in which different functions

– say, memory and logic – are put on different chips and then wired together in the same package. A 3-D package simply stacks multiple dies inside one package and connects them through wires bonded at the edges of the chips. The 3-D IC technology, on the other hand, makes possible certain kinds of chips that are otherwise cost prohibitive or difficult to produce.

Mixed-signal chips, which combine analog processing elements, such as antenna or pixel arrays, with digital elements, such as microprocessors and memories, are difficult and expensive to make in conventional planar chip-making processes. When you keep the analog functions on one chip and the digital functions on one or two other chips and combine them in a 3-D IC, yields rise and costs plummet. Thus, things like cellphones and digital cameras become a lot cheaper. New applications also become possible, such as the artificial retina being developed at Tohoku University in Japan. The device combines a quartz glass layer with an array of photodiodes that act as photoreceptor cells would in a human eye. Vertical interconnects link the photoreceptor layer to a layer of silicon circuits that convert the analog signal to bits and pass the digital signals on to the bottom layer of silicon circuits, where the image is processed and patterns recognized.

Indeed, 3-D integrated circuits give designers a path forward to cheap and reliable manufacturing of a whole array of digital-imaging, display, and

optoelectronic applications. Breaking up the chip into different levels for discrete tasks means the choice of substrate no longer constrains the designer. Take, for instance, the 3-D imaging chip being developed at the High Density Electronics Center at the University of Arkansas, for the Defense Advanced Research Projects Agency. The DARPA chip has a pixel array for photo detection that sits on the top layer and digital processing circuits in the levels below. Instead of each detector signal’s queuing to get off the detector chip to go to a signal-processing chip, the signal-processing circuitry is right there under each pixel, allowing the imaging system to take and process thousands of pictures per second.

The pixel array can use nonsilicon materials such as gallium nitride or indium phosphide to extend the spectral range into the infrared and ultraviolet wavelengths. This makes possible a variety of imaging applications at increased frame rates, such as ultraviolet flame sensing and combustion control, biological fluorescence detection, and pollution monitoring, as well as infrared heat sensing and chemical detection.

The most pressing reason for using 3-D interconnects is the same as the typical argument for using a 3-D package. In many instances, manufacturing all of the necessary circuitry – analog, logic, and memory – on a single chip is either impossible or much more expensive than putting it on two or more chips. Keeping different technologies on different dies and then connecting them directly using vertical interconnects lets manufacturers optimize each die’s performance while keeping costs down. Furthermore, die yield decreases exponentially with increases in die size, so splitting a single die design into two or more can save money in the end. The advocates of 3-D packages are onto something: at a certain point going vertical makes sense. But since the global interconnects in a 3-D package are routed through the edges of the chips to connect to each other, their length does not decrease.

No, the way to cut global wire lengths and take advantage of faster, more reliable signals flying through your chip is to go directly vertical with your interconnects. Academics have known this for years, and ongoing projects at the Georgia Institute of Technology, the Massachusetts Institute of Technology, and Stanford University show that significant overall reductions in wire length and chip size are possible. Also, with transistors placed closer together, smaller transistors can be used to send global signals. Not only does this decrease the size of the chip by getting rid of the large, powerful transistors typically used to drive global signals long distances, but it can also decrease power consumption significantly. As chip designs get more complicated, killing two birds with one stone this way can help a great deal.

While professors have wowed people at technical conferences, the emergence of two 3-D interconnect companies signals the commercial viability of the approach: Tru-Si Technologies of Sunnyvale, Calif., and Ziptronix Inc. of Morrisville, N.C., have received funding from Intel and Xilinx, respectively. These two companies have inspired several firms to quietly launch their own R&D projects. These other firms’ lab directors have seen 3-D interconnect technologies of various kinds since the early 1980s, but they have not progressed from lab to fab yet. The most recent