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8XC196Kx,8XC196Jx,87C196CA microcontroller family user's manual.1995.pdf
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MEMORY PARTITIONS

4.2.2.4Unsupported Locations Windowing Example

Assume that you wish to access location 1FF1H (the P5_MODE register, a memory-mapped SFR) with register-direct addressing through a 128-byte window. This location is in the range of addresses (1FE0–1FFFH) that cannot be windowed. Although you could set up the window by writing 1FH to the WSR, reading this location through the window would return FFH (all ones) and writing to it would not change the contents. However, you could access the peripheral SFRs in the range of 1F80–1FDFH with their windowed direct addresses.

4.2.2.5Using the Linker Locator to Set Up a Window

In this example, the linker locator is used to set up a window. The linker locator locates the window in the upper register file and determines the value to load in the WSR for access to that window. (Please consult the manual provided with the linker locator for details.)

*********

 

mod1

**************

mod1

module main

 

;Main module for linker

public function1

 

 

extrn

?WSR

 

;Must declare ?WSR as external

wsr

equ

 

14h:byte

 

sp

equ

 

18h:word

 

oseg

 

 

 

 

 

 

var1:

dsw

1

;Allocate variables in an

 

var2:

dsw

1

;overlayable segment

 

var3:

dsw

1

 

cseg

 

 

 

 

 

function1:

 

 

 

 

push

 

wsr

 

;Prolog code for wsr

 

ldb

 

wsr, #?WSR

;Prolog code for wsr

 

add

var1, var2, var3

;Use the variables as registers

 

;

 

 

 

 

 

;

 

 

 

 

 

;

 

 

 

 

 

ldb

 

wsr, [sp]

;Epilog code for wsr

 

add

sp, #2

 

;Epilog code for wsr

 

ret

 

 

 

 

end

 

 

 

 

 

********

 

mod2

**************

4-21

8XC196Kx, Jx, CA USER’S MANUAL

public function2 extrn ?WSR

wsr

equ

14h:byte

 

sp

equ

18h:word

 

oseg

 

 

 

 

 

var1:

dsw

1

 

 

var2:

dsw

1

 

 

var3:

dsw

1

 

cseg

 

 

 

 

function2:

 

 

 

 

push

wsr

 

;Prolog code for wsr

 

ldb

wsr, #?WSR

;Prolog code for wsr

 

add var1, var2, var3

 

 

;

 

 

 

 

;

 

 

 

 

;

 

 

 

 

ldb

wsr, [sp]

;Epilog code for wsr

 

add sp, #2

 

;Epilog code for wsr

 

ret

 

 

 

end

 

 

 

 

******************************

 

The following is an example of a linker invocation to link and locate the modules and to determine the proper windowing. (This example assumes an 8XC196CA, JT, JV, KS, or KT.)

RL196 MOD1.OBJ, MOD2.OBJ registers(100h-03ffh) windowsize(32)

The above linker controls tell the linker to use registers 0100–03FFH for windowing and to use a window size of 32 bytes. (These two controls enable windowing.)

The following is the map listing for the resultant output module (MOD1 by default):

SEGMENT MAP FOR mod1(MOD1):

TYPE

BASE

LENGTH

ALIGNMENT

MODULE NAME

----

----

------

---------

-----------

**RESERVED*

0000H

001AH

 

 

STACK

001AH

0006H

WORD

 

*** GAP ***

0020H

00E0H

 

 

OVRLY

0100H

0006H

WORD

MOD2

OVRLY

0106H

0006H

WORD

MOD1

*** GAP ***

010CH

1F74H

 

 

CODE

2080H

0011H

BYTE

MOD2

CODE

2091H

0011H

BYTE

MOD1

*** GAP ***

20A2H

DF5EH

 

 

4-22

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