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ATmega8535(L)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Electrical Characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Absolute Maximum Ratings*

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*NOTICE:

Stresses beyond those listed under “Absolute

 

Operating Temperature.................................. -55°C to +125°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Maximum Ratings” may cause permanent dam-

 

Storage Temperature ..................................... -65°C to +150°C

 

 

age to the device. This is a stress rating only and

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

functional operation of the device at these or

 

Voltage on any Pin except

RESET

 

 

 

 

 

 

 

 

 

other conditions beyond those indicated in the

 

with respect to Ground ................................-0.5V to VCC+0.5V

 

 

operational sections of this specification is not

 

Voltage on

 

 

 

with respect to Ground......-0.5V to +13.0V

 

 

implied. Exposure to absolute maximum rating

 

RESET

 

 

conditions for extended periods may affect device

 

Maximum Operating Voltage ............................................ 6.0V

 

 

reliability.

 

 

 

 

 

 

 

 

 

 

 

 

DC Current per I/O Pin ............................................... 40.0 mA

 

 

 

 

 

 

 

 

DC Current VCC and GND Pins ........................ 200.0 PDIP og

 

 

 

 

 

 

 

 

400 mA TQFP/MLF/PLCCmA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DC Characteristics

 

 

 

 

 

 

 

 

 

 

 

 

TA = -40°C to 85°C, VCC = 2.7V to 5.5V (unless otherwise noted)

 

 

 

 

 

 

Symbol

 

 

Parameter

 

Condition

 

 

Min

 

Typ

 

Max

Units

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input Low Voltage except

 

 

 

 

 

 

 

 

 

 

(1)

 

 

VIL

 

 

XTAL1 and

 

 

pins

 

VCC=2.7V - 5.5V

-0.5

 

 

 

0.2 VCC

V

 

RESET

 

 

 

VIH

 

 

Input High Voltage except

 

 

 

 

 

 

(2)

 

 

 

 

 

 

 

 

XTAL1 and

 

 

pins

 

VCC=2.7V - 5.5V

0.6 VCC

 

 

 

VCC + 0.5

V

 

RESET

 

 

 

VIL1

 

 

Input Low Voltage

 

VCC=2.7V - 5.5V

-0.5

 

 

 

(1)

V

 

 

 

XTAL1 pin

 

 

 

 

0.1 VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input High Voltage XTAL1

 

VCC=2.7V - 5.5V

(2)

 

 

 

 

 

 

VIH1

 

 

pin

 

0.8 VCC

 

 

 

VCC + 0.5

V

 

 

 

 

Input Low Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL2

 

RESET

VCC=2.7V - 5.5V

-0.5

 

 

 

0.2 VCC

V

 

 

 

pin

 

 

 

 

 

VIH2

 

 

Input High Voltage

 

 

 

 

 

 

(2)

 

 

 

 

 

 

 

 

 

pin

 

VCC=2.7V - 5.5V

0.9 VCC

 

 

 

VCC + 0.5

V

 

 

RESET

 

 

 

 

 

 

Output Low Voltage(3)

 

I

OL

= 20 mA, V

= 5V

 

 

 

 

0.7

V

 

VOL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CC

 

 

 

 

 

 

 

 

 

(Ports A,B,C,D)

 

IOL = 10 mA, VCC = 3V

 

 

 

 

0.5

V

 

 

 

 

 

 

 

 

 

 

VOH

 

 

Output High Voltage(4)

 

IOH = -20 mA, VCC = 5V

4.2

 

 

 

 

V

 

 

 

(Ports A,B,C,D)

 

IOH = -10 mA, VCC = 3V

2.2

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

IIL

 

 

Input Leakage

 

VCC = 5.5V, pin low

 

 

 

 

1

µA

 

 

 

Current I/O Pin

 

(absolute value)

 

 

 

 

 

IIH

 

 

Input Leakage

 

VCC = 5.5V, pin high

 

 

 

 

1

µA

 

 

 

Current I/O Pin

 

(absolute value)

 

 

 

 

 

RRST

 

 

Reset Pull-up Resistor

 

 

 

 

 

 

30

 

 

 

60

 

Rpu

 

 

I/O Pin Pull-up Resistor

 

 

 

 

 

 

20

 

 

 

50

255

2502K–AVR–10/06

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TA = -40°C to 85°C, VCC = 2.7V to 5.5V (unless otherwise noted)

(Continued)

 

 

 

Symbol

Parameter

Condition

 

 

 

Min

 

Typ

Max

Units

 

 

 

 

 

 

 

 

 

 

 

 

 

Active 4 MHz, VCC = 3V

 

 

 

 

 

 

4

 

mA

 

 

(ATmega8535L)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Active 8 MHz, VCC = 5V

 

 

 

 

 

 

14

 

mA

 

 

(ATmega8535)

 

 

 

 

 

 

 

 

Power Supply Current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC

Idle 4 MHz, VCC = 3V

 

 

 

 

 

 

3

 

mA

 

 

 

 

 

 

 

 

(ATmega8535L)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Idle 8 MHz, VCC = 5V

 

 

 

 

 

 

10

 

mA

 

 

(ATmega8535)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Power-down mode(5)

WDT enabled, VCC = 3V

 

 

 

 

 

 

< 10

 

µA

 

WDT disabled, VCC = 3V

 

 

 

 

 

 

< 3

 

µA

 

 

 

 

 

 

 

 

VACIO

Analog Comparator

VCC = 5V

 

 

 

 

 

 

 

40

mV

Input Offset Voltage

Vin = VCC/2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IACLK

Analog Comparator

VCC = 5V

 

 

-50

 

 

 

50

nA

Input Leakage Current

Vin = VCC/2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tACPD

Analog Comparator

VCC = 2.7V

 

 

 

 

 

 

750

 

ns

Propagation Delay

VCC = 4.0V

 

 

 

 

 

 

500

 

 

 

 

 

 

 

 

 

Notes: 1. “Max” means the highest value where the pin is guaranteed to be read as low.

2.“Min” means the lowest value where the pin is guaranteed to be read as high.

3.Although each I/O port can sink more than the test conditions (20mA at VCC = 5V, 10mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed:

PDIP Package:

1] The sum of all IOL, for all ports, should not exceed 200 mA.

2] The sum of all IOL, for port A0 - A7, should not exceed 100 mA.

3] The sum of all IOL, for ports B0 - B7,C0 - C7, D0 - D7 and XTAL2, should not exceed 100 mA. PLCC/MLF/TQFP Package:

1] The sum of all IOL, for all ports, should not exceed 400 mA.

2] The sum of all IOL, for ports A0 - A7, should not exceed 100 mA. 3] The sum of all IOL, for ports B0 - B3, should not exceed 100 mA. 4] The sum of all IOL, for ports B4 - B7, should not exceed 100 mA. 5] The sum of all IOL, for ports C0 - C3, should not exceed 100 mA. 6] The sum of all IOL, for ports C4 - C7, should not exceed 100 mA.

7] The sum of all IOL, for ports D0 - D3 and XTAL2, should not exceed 100 mA. 8] The sum of all IOL, for ports D4 - D7, should not exceed 100 mA.

If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test condition.

4.Although each I/O port can source more than the test conditions (20mA at VCC = 5V, 10mA at VCC = 3V) under steady state conditions (non-transient), the following must be observed:

PDIP Package:

1] The sum of all IOH, for all ports, should not exceed 200 mA.

2] The sum of all IOH, for port A0 - A7, should not exceed 100 mA.

3] The sum of all IOH, for ports B0 - B7,C0 - C7, D0 - D7 and XTAL2, should not exceed 100 mA. PLCC/MLF/TQFP Package:

1] The sum of all IOH, for all ports, should not exceed 400 mA.

2] The sum of all IOH, for ports A0 - A7, should not exceed 100 mA. 3] The sum of all IOH, for ports B0 - B3, should not exceed 100 mA. 4] The sum of all IOH, for ports B4 - B7, should not exceed 100 mA. 5] The sum of all IOH, for ports C0 - C3, should not exceed 100 mA. 6] The sum of all IOH, for ports C4 - C7, should not exceed 100 mA.

7] The sum of all IOH, for ports D0 - D3 and XTAL2, should not exceed 100 mA. 8] The sum of all IOH, for ports D4 - D7, should not exceed 100 mA

256 ATmega8535(L)

2502K–AVR–10/06

ATmega8535(L)

If IOH exceeds the test condition, VOH may exceed the related specification. Pins are not guaranteed to source current greater than the listed test condition.

5. Minimum VCC for Power-down is 2.5V.

257

2502K–AVR–10/06

External Clock Drive

Waveforms

External Clock Drive

Figure 126. External Clock Drive Waveforms

VIH1

VIL1

Table 110. External Clock Drive

 

 

 

VCC = 2.7V to 5.5V

VCC = 4.5V to 5.5V

 

 

Symbol

Parameter

Min

 

Max

Min

Max

 

Units

 

 

 

 

 

 

 

 

 

 

 

1/tCLCL

Oscillator Frequency

0

 

8

0

 

16

 

MHz

tCLCL

Clock Period

125

 

 

62.5

 

 

ns

tCHCX

High Time

50

 

 

25

 

 

ns

tCLCX

Low Time

50

 

 

25

 

 

ns

tCLCH

Rise Time

 

 

1.6

 

 

0.5

 

μs

tCHCL

Fall Time

 

 

1.6

 

 

0.5

 

μs

 

Change in period from

 

 

 

 

 

 

 

 

 

one clock cycle to the

 

 

2

 

 

2

 

%

tCLCL

next

 

 

 

 

 

 

 

 

Table 111. External RC Oscillator, Typical Frequencies

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R [kΩ](1)

 

 

C [pF]

 

 

f(2)

 

 

33

 

 

22

 

 

650 kHz

 

 

 

 

 

 

 

 

 

 

 

10

 

 

22

 

 

2.0 MHz

 

 

 

 

 

 

 

 

 

 

 

 

Notes: 1. R should be in the range 3 kΩ - 100 kΩ, and C should be at least 20 pF. The C values given in the table includes pin capacitance. This will vary with package type.

2. The frequency will vary with package type and board layout.

258 ATmega8535(L)

2502K–AVR–10/06

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