57 HAL SRAM Generic Driver

57.1SRAM Firmware driver registers structures

57.1.1SRAM_HandleTypeDef

Data Fields

FMC_NORSRAM_TypeDef * Instance

FMC_NORSRAM_EXTENDED_TypeDef * Extended

FMC_NORSRAM_InitTypeDef Init

HAL_LockTypeDef Lock

__IO HAL_SRAM_StateTypeDef State

DMA_HandleTypeDef * hdma

Field Documentation

FMC_NORSRAM_TypeDef* SRAM_HandleTypeDef::Instance

Register base address

FMC_NORSRAM_EXTENDED_TypeDef* SRAM_HandleTypeDef::Extended

Extended mode register base address

FMC_NORSRAM_InitTypeDef SRAM_HandleTypeDef::Init

SRAM device control configuration parameters

HAL_LockTypeDef SRAM_HandleTypeDef::Lock

SRAM locking object

__IO HAL_SRAM_StateTypeDef SRAM_HandleTypeDef::State

SRAM device access state

DMA_HandleTypeDef* SRAM_HandleTypeDef::hdma

Pointer DMA handler

57.2SRAM Firmware driver API description

57.2.1How to use this driver

This driver is a generic layered driver which contains a set of APIs used to control SRAM memories. It uses the FMC layer functions to interface with SRAM devices. The following sequence should be followed to configure the FMC/FSMC to interface with SRAM/PSRAM memories:

1.Declare a SRAM_HandleTypeDef handle structure, for example: SRAM_HandleTypeDef hsram; and:

Fill the SRAM_HandleTypeDef handle "Init" field with the allowed values of the structure member.

Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined base register instance for NOR or SRAM device

Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined base register instance for NOR or SRAM extended mode

2.Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended mode timings; for example: FMC_NORSRAM_TimingTypeDef Timing and

FMC_NORSRAM_TimingTypeDef ExTiming; and fill its fields with the allowed values of the structure member.

3.Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function performs the following sequence:

a.MSP hardware layer configuration using the function HAL_SRAM_MspInit()

b.Control register configuration using the FMC NORSRAM interface function FMC_NORSRAM_Init()

c.Timing register configuration using the FMC NORSRAM interface function FMC_NORSRAM_Timing_Init()

d.Extended mode Timing register configuration using the FMC NORSRAM interface function FMC_NORSRAM_Extended_Timing_Init()

e.Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()

4.At this stage you can perform read/write accesses from/to the memory connected to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the following APIs:

HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access

HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer

5.You can also control the SRAM device by calling the control APIs

HAL_SRAM_WriteOperation_Enable()/ HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation

6. You can continuously monitor the SRAM device HAL state by calling the function HAL_SRAM_GetState()

57.2.2SRAM Initialization and de_initialization functions

This section provides functions allowing to initialize/de-initialize the SRAM memory

This section contains the following APIs:

HAL_SRAM_Init()

HAL_SRAM_DeInit()

HAL_SRAM_MspInit()

HAL_SRAM_MspDeInit()

HAL_SRAM_DMA_XferCpltCallback()

HAL_SRAM_DMA_XferErrorCallback()

57.2.3SRAM Input and Output functions

This section provides functions allowing to use and control the SRAM memory

This section contains the following APIs:

HAL_SRAM_Read_8b()

HAL_SRAM_Write_8b()

HAL_SRAM_Read_16b()

HAL_SRAM_Write_16b()

HAL_SRAM_Read_32b()

HAL_SRAM_Write_32b()

HAL_SRAM_Read_DMA()

HAL_SRAM_Write_DMA()

57.2.4SRAM Control functions

This subsection provides a set of functions allowing to control dynamically the SRAM interface.

This section contains the following APIs:

HAL_SRAM_WriteOperation_Enable()

HAL_SRAM_WriteOperation_Disable()

57.2.5SRAM State functions

This subsection permits to get in run-time the status of the SRAM controller and the data flow.

This section contains the following APIs:

HAL_SRAM_GetState()

57.2.6HAL_SRAM_Init

57.2.7HAL_SRAM_DeInit

57.2.8HAL_SRAM_MspInit

57.2.9HAL_SRAM_MspDeInit

57.2.10HAL_SRAM_DMA_XferCpltCallback

57.2.11HAL_SRAM_DMA_XferErrorCallback

57.2.12HAL_SRAM_Read_8b

57.2.13HAL_SRAM_Write_8b

57.2.14HAL_SRAM_Read_16b