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UM1725

HAL RCC Extension Driver

46 HAL RCC Extension Driver

46.1RCCEx Firmware driver registers structures

46.1.1RCC_PLLInitTypeDef

Data Fields

uint32_t PLLState

uint32_t PLLSource

uint32_t PLLM

uint32_t PLLN

uint32_t PLLP

uint32_t PLLQ

uint32_t PLLR

Field Documentation

uint32_t RCC_PLLInitTypeDef::PLLState

The new state of the PLL. This parameter can be a value of RCC_PLL_Config

uint32_t RCC_PLLInitTypeDef::PLLSource

RCC_PLLSource: PLL entry clock source. This parameter must be a value of

RCC_PLL_Clock_Source

uint32_t RCC_PLLInitTypeDef::PLLM

PLLM: Division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 0 and Max_Data = 63

uint32_t RCC_PLLInitTypeDef::PLLN

PLLN: Multiplication factor for PLL VCO output clock. This parameter must be a number between Min_Data = 192 and Max_Data = 432

uint32_t RCC_PLLInitTypeDef::PLLP

PLLP: Division factor for main system clock (SYSCLK). This parameter must be a value of RCC_PLLP_Clock_Divider

uint32_t RCC_PLLInitTypeDef::PLLQ

PLLQ: Division factor for OTG FS, SDIO and RNG clocks. This parameter must be a number between Min_Data = 4 and Max_Data = 15

uint32_t RCC_PLLInitTypeDef::PLLR

PLLR: PLL division factor for I2S, SAI, SYSTEM, SPDIFRX clocks. This parameter is only available in STM32F446xx devices. This parameter must be a number between Min_Data = 2 and Max_Data = 7

46.1.2RCC_PLLI2SInitTypeDef

Data Fields

uint32_t PLLI2SM

uint32_t PLLI2SN

uint32_t PLLI2SP

uint32_t PLLI2SQ

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uint32_t PLLI2SR

Field Documentation

uint32_t RCC_PLLI2SInitTypeDef::PLLI2SM

Specifies division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 2 and Max_Data = 63

uint32_t RCC_PLLI2SInitTypeDef::PLLI2SN

Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 192 and Max_Data = 432

uint32_t RCC_PLLI2SInitTypeDef::PLLI2SP

Specifies division factor for SPDIFRX Clock. This parameter must be a value of

RCCEx_PLLI2SP_Clock_Divider

uint32_t RCC_PLLI2SInitTypeDef::PLLI2SQ

Specifies the division factor for SAI clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLI2S is selected as Clock Source SAI

uint32_t RCC_PLLI2SInitTypeDef::PLLI2SR

Specifies the division factor for I2S clock. This parameter must be a number between Min_Data = 2 and Max_Data = 7. This parameter will be used only when PLLI2S is selected as Clock Source I2S

46.1.3RCC_PLLSAIInitTypeDef

Data Fields

uint32_t PLLSAIM

uint32_t PLLSAIN

uint32_t PLLSAIP

uint32_t PLLSAIQ

Field Documentation

uint32_t RCC_PLLSAIInitTypeDef::PLLSAIM

Spcifies division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 2 and Max_Data = 63

uint32_t RCC_PLLSAIInitTypeDef::PLLSAIN

Specifies the multiplication factor for PLLI2S VCO output clock. This parameter must be a number between Min_Data = 192 and Max_Data = 432

uint32_t RCC_PLLSAIInitTypeDef::PLLSAIP

Specifies division factor for OTG FS, SDIO and RNG clocks. This parameter must be

a value of RCCEx_PLLSAIP_Clock_Divider

uint32_t RCC_PLLSAIInitTypeDef::PLLSAIQ

Specifies the division factor for SAI clock. This parameter must be a number between Min_Data = 2 and Max_Data = 15. This parameter will be used only when PLLSAI is selected as Clock Source SAI

46.1.4RCC_PeriphCLKInitTypeDef

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Data Fields

 

uint32_t PeriphClockSelection

 

RCC_PLLI2SInitTypeDef PLLI2S

 

RCC_PLLSAIInitTypeDef PLLSAI

 

uint32_t PLLI2SDivQ

 

uint32_t PLLSAIDivQ

 

uint32_t Sai1ClockSelection

 

uint32_t Sai2ClockSelection

 

uint32_t I2sApb1ClockSelection

 

uint32_t I2sApb2ClockSelection

 

uint32_t RTCClockSelection

 

uint32_t SdioClockSelection

 

uint32_t CecClockSelection

 

uint32_t Fmpi2c1ClockSelection

 

uint32_t SpdifClockSelection

 

uint32_t Clk48ClockSelection

 

uint8_t TIMPresSelection

Field Documentation

uint32_t RCC_PeriphCLKInitTypeDef::PeriphClockSelection

The Extended Clock to be configured. This parameter can be a value of

RCCEx_Periph_Clock_Selection

RCC_PLLI2SInitTypeDef RCC_PeriphCLKInitTypeDef::PLLI2S

PLL I2S structure parameters. This parameter will be used only when PLLI2S is selected as Clock Source I2S or SAI

RCC_PLLSAIInitTypeDef RCC_PeriphCLKInitTypeDef::PLLSAI

PLL SAI structure parameters. This parameter will be used only when PLLI2S is selected as Clock Source SAI or LTDC

uint32_t RCC_PeriphCLKInitTypeDef::PLLI2SDivQ

Specifies the PLLI2S division factor for SAI1 clock. This parameter must be a number between Min_Data = 1 and Max_Data = 32 This parameter will be used only when PLLI2S is selected as Clock Source SAI

uint32_t RCC_PeriphCLKInitTypeDef::PLLSAIDivQ

Specifies the PLLI2S division factor for SAI1 clock. This parameter must be a number between Min_Data = 1 and Max_Data = 32 This parameter will be used only when PLLSAI is selected as Clock Source SAI

uint32_t RCC_PeriphCLKInitTypeDef::Sai1ClockSelection

Specifies SAI1 Clock Source Selection. This parameter can be a value of

RCCEx_SAI1_Clock_Source

uint32_t RCC_PeriphCLKInitTypeDef::Sai2ClockSelection

Specifies SAI2 Clock Source Selection. This parameter can be a value of

RCCEx_SAI2_Clock_Source

uint32_t RCC_PeriphCLKInitTypeDef::I2sApb1ClockSelection

Specifies I2S APB1 Clock Source Selection. This parameter can be a value of

RCCEx_I2SAPB1_Clock_Source

uint32_t RCC_PeriphCLKInitTypeDef::I2sApb2ClockSelection

Specifies I2S APB2 Clock Source Selection. This parameter can be a value of

RCCEx_I2SAPB2_Clock_Source

uint32_t RCC_PeriphCLKInitTypeDef::RTCClockSelection

Specifies RTC Clock Source Selection. This parameter can be a value of

RCC_RTC_Clock_Source

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