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ARM advanced microcontroller bus architecture (AMBA) specification.Rev 2.0.pdf
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Chapter 6

AMBA Test Methodology

This chapter describes the test interface used with AMBA module designs. It contains the following sections:

About the AMBA test interface on page 6-2

External interface on page 6-4

Test vector types on page 6-6

Test interface controller on page 6-7

The AHB Test Interface Controller on page 6-12

Example AMBA AHB test sequences on page 6-17

The ASB test interface controller on page 6-25

Example AMBA ASB test sequences on page 6-27.

ARM IHI 0011A

© Copyright ARM Limited 1999. All rights reserved.

6-1

AMBA Test Methodology

6.1About the AMBA test interface

The AMBA test philosophy allows individual modules in the system to be tested in isolation. Each module is designed so it can be tested only using transfers from the bus and does not rely on the interaction of any other system element. Therefore it is necessary to have access to the inputs and outputs of the peripheral that are not directly connected to the bus and this is provided by a test harness.

 

 

 

 

 

 

 

 

 

 

Dedicated

 

 

Application

 

 

 

Dedicated

peripheral

 

 

 

 

 

 

 

peripheral

 

 

 

 

peripheral

 

 

 

inputs

 

 

 

 

 

outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Test

 

 

 

Test

Bus interface

 

stimuli

 

 

results

 

 

 

 

Figure 6-1 Peripheral test harness

6-2

© Copyright ARM Limited 1999. All rights reserved.

ARM IHI 0011A

AMBA Test Methodology

A low gate-count Test Interface Controller (TIC) bus master module is required in the system to allow externally applied test vectors to be converted into internal bus transfers.

The TIC uses a minimal three-wire handshake mechanism to control the application of test vectors and the data path of the External Bus Interface (EBI) is used to provide a high speed 32-bit parallel vector interface.

TCLK

Test

 

TREQA

 

Interface

Control

 

TREQB

Controller

 

(TIC)

Address

TACK

 

 

 

External

 

TBUS[31:0]

Bus

Data

Interface

 

 

 

(EBI)

 

Figure 6-2 TIC and external bus interface interaction

To support this method of test vector application a 32-bit bidirectional port must be available during test access. For a system with an external data bus interface of 32-bits this is straightforward. 16-bit and 8-bit data bus designs require, for example, 16 or 24 address lines to be reconfigured as bidirectional test port signals for test mode access.

ARM IHI 0011A

© Copyright ARM Limited 1999. All rights reserved.

6-3