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ARM PrimeCell synchronous static memory controller technical reference manual.pdf
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Programmer’s Model for Test

4.2Test registers

Test registers are provided to enable testing of the SSMC using the AMBA TIC block level tests methodology and for integration testing.

4.2.1SSMC test control register, SSMCITCR

This read/write register is used to control the test mode of the SSMC. Table 4-1 shows the bit assignment of the SSMCITCR register.

 

 

 

 

Table 4-1 SSMCITCR register bits

 

 

 

 

Bits

Name

Type

Description

 

 

 

 

31:1

Reserved

-

Reserved, do not modify, read as zero, write as zero.

 

 

 

 

0

S

Read/write

Test mode enable. Multiplex the test registers to control the input and output lines:

 

 

 

0

= normal operation

 

 

 

1

= test registers multiplexed onto input and output lines.

 

 

 

 

 

4.2.2SSMC test input register, SSMCITIP

This read/write register is used to control and read the inputs of the SSMC. Table 4-2 shows the bit assignment of the SSMCITIP register.

 

 

 

Table 4-2 SSMCITIP register bits

 

 

 

 

Bits

Name

Type

Description

 

 

 

 

31:7

Reserved

-

Reserved, do not modify, read as zero, write as zero.

 

 

 

 

6

SMBUSBACKOFFEBI

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

 

 

 

 

5

SMTICBUSGNTEBI

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

 

 

 

 

4

SMBUSGNTEBI

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

ARM DDI 0236A

Copyright © 2001. All rights reserved.

4-3

Programmer’s Model for Test

 

 

 

Table 4-2 SSMCITIP register bits (continued)

 

 

 

 

Bits

Name

Type

Description

 

 

 

 

3

SMEXTBUSMUX

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

 

 

 

 

2:1

SMMEMCLKRATIO

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

 

 

 

 

0

SMBIGENDIAN

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

 

 

 

 

4.2.3SSMC test output register, SSMCITOP

This read/write register is used to control and read the outputs of the SSMC. Table 4-3 shows the bit assignment of the SSMCITOP register.

 

 

 

Table 4-3 SSMCITOP register bits

 

 

 

 

Bits

Name

Type

Description

 

 

 

 

31:2

Reserved

-

Reserved, do not modify, read as zero, write as zero.

 

 

 

 

1

SMTICBUSREQEBI

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

 

 

 

 

0

SMBUSREQEBI

Read/write

Read returns current value of signal.

 

 

 

Write sets signal to value written.

 

 

 

 

4-4

Copyright © 2001. All rights reserved.

ARM DDI 0236A