ATtiny13
18.5System and Reset Characteristics
Table 18-4. |
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Reset, Brown-out and Internal Voltage Reference Characteristics |
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Symbol |
Parameter |
Condition |
Min |
Typ |
Max |
Units |
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Power-on Reset Threshold Voltage (rising) |
TA = -40 to +85°C |
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1.2 |
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V |
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VPOT |
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Power-on Reset Threshold Voltage |
TA = -40 to +85°C |
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1.1 |
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V |
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(falling)(1) |
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VRST |
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Pin Threshold Voltage |
VCC = 1.8V - 5.5V |
0.2 VCC |
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0.9 VCC |
V |
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RESET |
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tRST |
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Minimum pulse width on |
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Pin |
VCC = 1.8V - 5.5V |
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2.5 |
µs |
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RESET |
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VHYST |
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Brown-out Detector Hysteresis |
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50 |
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mV |
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tBOD |
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Min Pulse Width on Brown-out Reset |
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2 |
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µs |
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VBG |
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Bandgap reference voltage |
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1.0 |
1.1 |
1.2 |
V |
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tBG |
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Bandgap reference start-up time |
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40 |
70 |
µs |
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IBG |
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Bandgap reference current consumption |
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15 |
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µs |
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Note: 1. The Power-on Reset will not work unless the supply voltage has been below VPOT (falling)
18.5.1Brown-Out Detection
Table 18-5. VBOT vs. BODLEVEL Fuse Coding
BODLEVEL [1:0] Fuses |
Min(1) |
Typ(1) |
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Max(1) |
Units |
11 |
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BOD Disabled |
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10 |
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1.8 |
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01 |
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2.7 |
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V |
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00 |
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4.3 |
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Note: 1. VBOT may be below nominal minimum operating voltage for some devices. For devices where this is the case, the device is tested down to VCC = VBOT during the production test. This guarantees that a Brown-out Reset will occur before VCC drops to a voltage where correct operation of the microcontroller is no longer guaranteed.
18.6Analog Comparator Characteristics
Table 18-6. Analog Comparator Characteristics, TA = -40°C to +85°C
Symbol |
Parameter |
Condition |
Min |
Typ |
Max |
Units |
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VAIO |
Input Offset Voltage |
VCC = 5V, VIN = VCC / 2 |
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< 10 |
40 |
mV |
ILAC |
Input Leakage Current |
VCC = 5V, VIN = VCC / 2 |
-50 |
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50 |
nA |
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Analog Propagation Delay |
VCC = 2.7V |
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750 |
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tAPD |
(from saturation to slight overdrive) |
VCC = 4.0V |
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500 |
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ns |
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Analog Propagation Delay |
VCC = 2.7V |
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100 |
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(large step change) |
VCC = 4.0V |
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75 |
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tDPD |
Digital Propagation Delay |
VCC = 1.8V - 5.5 |
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1 |
2 |
CLK |
Note: All parameters are based on simulation results and they are not tested in production
119
2535J–AVR–08/10
18.7ADC Characteristics
Table 18-7. ADC Characteristics, Single Ended Channels. TA = -40°C to +85°C
Symbol |
Parameter |
Condition |
Min |
Typ |
Max |
Units |
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Resolution |
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10 |
Bits |
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VREF = 4V, VCC = 4V, |
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2 |
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LSB |
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ADC clock = 200 kHz |
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VREF = 4V, VCC = 4V |
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3 |
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LSB |
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Absolute accuracy |
ADC clock = 1 MHz |
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(Including INL, DNL, and |
VREF = 4V, VCC = 4V |
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Quantization, Gain and Offset |
ADC clock = 200 kHz |
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1.5 |
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LSB |
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Errors) |
Noise Reduction Mode |
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VREF = 4V, VCC = 4V, |
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2.5 |
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LSB |
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ADC clock = 1 MHz |
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Noise Reduction Mode |
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Integral Non-Linearity (INL) |
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(Accuracy after Offset and |
VREF = 4V, VCC = 4V |
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1 |
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LSB |
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Gain Calibration) |
ADC clock = 200 kHz |
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Differential Non-linearity |
VREF = 4V, VCC = 4V |
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0.5 |
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LSB |
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(DNL) |
ADC clock = 200 kHz |
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Gain Error |
VREF = 4V, VCC = 4V |
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2.5 |
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LSB |
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ADC clock = 200 kHz |
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Offset Error |
VREF = 4V, VCC = 4V |
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1.5 |
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LSB |
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ADC clock = 200 kHz |
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Conversion Time |
Free Running Conversion |
13 |
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260 |
µs |
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Clock Frequency |
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50 |
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1000 |
kHz |
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VIN |
Input Voltage |
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GND |
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VREF |
V |
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Input Bandwidth |
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38.5 |
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kHz |
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VINT |
Internal Voltage Reference |
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1.0 |
1.1 |
1.2 |
V |
RAIN |
Analog Input Resistance |
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100 |
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MΩ |
120 ATtiny13 
2535J–AVR–08/10
ATtiny13
18.8Serial Programming Characteristics
Figure 18-4. Serial Programming Timing
MOSI |
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tOVSH |
tSHOX |
tSLSH |
SCK |
tSHSL |
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MISO |
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Figure 18-5. Serial Programming Waveform |
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SERIAL DATA INPUT |
MSB |
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LSB |
(MOSI) |
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SERIAL DATA OUTPUT |
MSB |
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LSB |
(MISO) |
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SERIAL CLOCK INPUT (SCK)
SAMPLE
Table 18-8. Serial Programming Characteristics, TA = -40°C to +85°C, VCC = 1.8 - 5.5V (Unless Otherwise Noted)
Symbol |
Parameter |
Min |
Typ |
Max |
Units |
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1/tCLCL |
Oscillator Frequency (ATtiny13V, VCC = 1.8 - 5.5V) |
0 |
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1 |
MHz |
tCLCL |
Oscillator Period (ATtiny13V, VCC = 1.8 - 5.5V) |
1000 |
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ns |
1/tCLCL |
Oscillator Frequency (ATtiny13, VCC = 2.7 - 5.5V) |
0 |
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9.6 |
MHz |
tCLCL |
Oscillator Period (ATtiny13, VCC = 2.7 - 5.5V) |
104 |
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ns |
1/tCLCL |
Oscillator Frequency (ATtiny13, VCC = 4.5V - 5.5V) |
0 |
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20 |
MHz |
tCLCL |
Oscillator Period (ATtiny13, VCC = 4.5V - 5.5V) |
50 |
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ns |
tSHSL |
SCK Pulse Width High |
(1) |
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ns |
2 tCLCL |
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tSLSH |
SCK Pulse Width Low |
(1) |
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ns |
2 tCLCL |
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tOVSH |
MOSI Setup to SCK High |
tCLCL |
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tSHOX |
MOSI Hold after SCK High |
2 tCLCL |
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ns |
Note: 1. |
2 tCLCL for fck < 12 MHz, 3 tCLCL for fck >= 12 MHz |
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121
2535J–AVR–08/10
18.9High-voltage Serial Programming Characteristics
Figure 18-6. High-voltage Serial Programming Timing
SDI (PB0), SII (PB1) |
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tIVSH |
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tSHIX |
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tSLSH |
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SCI (PB3) |
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tSHSL |
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SDO (PB2) |
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tSHOV |
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Table 18-9. |
High-voltage Serial Programming Characteristics |
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TA = 25°C, VCC = 5.0V ± 10% (Unless otherwise noted) |
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Symbol |
Parameter |
Min |
Typ |
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Max |
Units |
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tSHSL |
SCI (PB3) Pulse Width High |
110 |
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ns |
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tSLSH |
SCI (PB3) Pulse Width Low |
110 |
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ns |
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tIVSH |
SDI (PB0), SII (PB1) Valid to SCI (PB3) High |
50 |
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ns |
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tSHIX |
SDI (PB0), SII (PB1) Hold after SCI (PB3) High |
50 |
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ns |
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tSHOV |
SCI (PB3) High to SDO (PB2) Valid |
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16 |
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ns |
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tWLWH_PFB |
Wait after Instr. 3 for Write Fuse Bits |
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2.5 |
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122 ATtiny13 
2535J–AVR–08/10