- •9.7.2 More Timers And Counters
- •9.7.3 Deadman Switch
- •9.7.4 Conveyor
- •9.7.5 Accept/Reject Sorting
- •9.7.6 Shear Press
- •9.8 SUMMARY
- •9.9 PRACTICE PROBLEMS
- •9.10 PRACTICE PROBLEM SOLUTIONS
- •9.11 ASSIGNMENT PROBLEMS
- •10. STRUCTURED LOGIC DESIGN
- •10.1 INTRODUCTION
- •10.2 PROCESS SEQUENCE BITS
- •10.3 TIMING DIAGRAMS
- •10.4 DESIGN CASES
- •10.5 SUMMARY
- •10.6 PRACTICE PROBLEMS
- •10.7 PRACTICE PROBLEM SOLUTIONS
- •10.8 ASSIGNMENT PROBLEMS
- •11. FLOWCHART BASED DESIGN
- •11.1 INTRODUCTION
- •11.2 BLOCK LOGIC
- •11.3 SEQUENCE BITS
- •11.4 SUMMARY
- •11.5 PRACTICE PROBLEMS
- •11.6 PRACTICE PROBLEM SOLUTIONS
- •11.7 ASSIGNMENT PROBLEMS
- •12. STATE BASED DESIGN
- •12.1 INTRODUCTION
- •12.1.1 State Diagram Example
- •12.1.2 Conversion to Ladder Logic
- •12.1.2.1 - Block Logic Conversion
- •12.1.2.2 - State Equations
- •12.1.2.3 - State-Transition Equations
- •12.2 SUMMARY
- •12.3 PRACTICE PROBLEMS
- •12.4 PRACTICE PROBLEM SOLUTIONS
- •12.5 ASSIGNMENT PROBLEMS
- •13. NUMBERS AND DATA
- •13.1 INTRODUCTION
- •13.2 NUMERICAL VALUES
- •13.2.1 Binary
- •13.2.1.1 - Boolean Operations
- •13.2.1.2 - Binary Mathematics
- •13.2.2 Other Base Number Systems
- •13.2.3 BCD (Binary Coded Decimal)
- •13.3 DATA CHARACTERIZATION
- •13.3.1 ASCII (American Standard Code for Information Interchange)
- •13.3.2 Parity
- •13.3.3 Checksums
- •13.3.4 Gray Code
- •13.4 SUMMARY
- •13.5 PRACTICE PROBLEMS
- •13.6 PRACTICE PROBLEM SOLUTIONS
- •13.7 ASSIGNMENT PROBLEMS
- •14. PLC MEMORY
- •14.1 INTRODUCTION
- •14.2 MEMORY ADDRESSES
- •14.3 PROGRAM FILES
- •14.4 DATA FILES
- •14.4.1 User Bit Memory
- •14.4.2 Timer Counter Memory
- •14.4.3 PLC Status Bits (for PLC-5s and Micrologix)
- •14.4.4 User Function Control Memory
- •14.4.5 Integer Memory
- •14.4.6 Floating Point Memory
- •14.5 SUMMARY
- •14.6 PRACTICE PROBLEMS
- •14.7 PRACTICE PROBLEM SOLUTIONS
- •14.8 ASSIGNMENT PROBLEMS
- •15. LADDER LOGIC FUNCTIONS
- •15.1 INTRODUCTION
- •15.2 DATA HANDLING
- •15.2.1 Move Functions
- •15.2.2 Mathematical Functions
- •15.2.3 Conversions
- •15.2.4 Array Data Functions
- •15.2.4.1 - Statistics
- •15.2.4.2 - Block Operations
- •15.3 LOGICAL FUNCTIONS
- •15.3.1 Comparison of Values
- •15.3.2 Boolean Functions
- •15.4 DESIGN CASES
- •15.4.1 Simple Calculation
- •15.4.2 For-Next
- •15.4.3 Series Calculation
- •15.4.4 Flashing Lights
- •15.5 SUMMARY
- •15.6 PRACTICE PROBLEMS
- •15.7 PRACTICE PROBLEM SOLUTIONS
- •15.8 ASSIGNMENT PROBLEMS
plc basic functions - 15.15
FAL
A Control R6:0 length 5 position 0 Mode all
Destination #N7:5 Expression #N7:0 + 5
FAL
B Control R6:1
length 5
position 0
Mode 2
Destination #N7:5
Expression N7:0 + 5
FAL
C Control R6:2 length 5 position 0
Mode incremental Destination N7:5 Expression #N7:0 + 5
Figure 15.14 File Algebra Example
file to file
element to file file to element
file to element
15.3 LOGICAL FUNCTIONS
15.3.1 Comparison of Values
Comparison functions are shown in Figure 15.15. Previous function blocks were outputs, these replace input contacts. The example shows an EQU (equal) function that compares two floating point numbers. If the numbers are equal, the output bit B3:5/1 is true, otherwise it is false. Other types of equality functions are also listed.
plc basic functions - 15.16
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B3:5 |
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EQU(value,value) - equal NEQ(value,value) - not equal LES(value,value) - less than LEQ(value,value) - less than or equal GRT(value,value) - greater than GEQ(value,value) - greater than or equal
CMP(expression) - compares two values for equality MEQ(value,mask,threshold) - compare for equality using a mask LIM(low limit,value,high limit) - check for a value between limits
Figure 15.15 Comparison Functions
The example in Figure 15.16 shows the six basic comparison functions. To the right of the figure are examples of the comparison operations.
plc basic functions - 15.17
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O:012 |
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A N7:03 |
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O:012 |
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LES |
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Figure 15.16 Comparison Function Examples
O:012/0=0
O:012/1=1
N7:3=5 O:012/2=0 N7:2=3 O:012/3=0 O:012/4=1 O:012/5=1
O:012/0=1
O:012/1=0
N7:3=3 O:012/2=0 N7:2=3 O:012/3=1 O:012/4=0 O:012/5=1
O:012/0=0
O:012/1=1
N7:3=1 O:012/2=1 N7:2=3 O:012/3=1 O:012/4=0 O:012/5=0
The ladder logic in Figure 15.16 is recreated in Figure 15.17 with the CMP function that allows text expressions.
plc basic functions - 15.18
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O:012 |
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N7:03 = N7:02 |
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Figure 15.17 Equivalent Statements Using CMP Statements
Expressions can also be used to do more complex comparisons, as shown in Figure 15.18. The expression will determine if F8:1 is between F8:0 and F8:2.
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Figure 15.18 A More Complex Comparison Expression
The LIM and MEQ functions are shown in Figure 15.19. The first three functions will compare a test value to high and low limits. If the high limit is above the low limit and the test value is between or equal to one limit, then it will be true. If the low limit is above
plc basic functions - 15.19
the high limit then the function is only true for test values outside the range. The masked equal will compare the bits of two numbers, but only those bits that are true in the mask.
LIM
low limit N7:0 test value N7:1 high limit N7:2
LIM
low limit N7:2 test value N7:1 high limit N7:0
LIM
low limit N7:2 test value N7:3 high limit N7:0
MEQ source N7:0 mask N7:1
compare N7:2
MEQ source N7:0 mask N7:1
compare N7:4
N7:5/0
N7:5/1
N7:5/2
N7:5/3
N7:5/4
Addr. |
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before (decimal) |
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N7:0 |
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1 |
0000000000000001 |
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0000000000000001 |
N7:1 |
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0000000000000101 |
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0000000000000101 |
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0000000000001011 |
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0000000000001011 |
N7:3 |
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0000000000001111 |
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0000000000001111 |
N7:4 |
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0000000000001000 |
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0000000000001000 |
N7:5 |
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0000000000000000 |
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0000000000001101 |
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Figure 15.19 Complex Comparison Functions
plc basic functions - 15.20
Figure 15.20 shows a numberline that helps determine when the LIM function will be true.
high limit |
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Figure 15.20 A Number Line for the LIM Function
File to file comparisons are also permitted using the FSC instruction shown in Figure 15.21. The instruction uses the control word R6:0. It will interpret the expression 10 times, doing two comparisons per logic scan (the Mode is 2). The comparisons will be
F8:10<F8:0, F8:11<F8:0 then F8:12<F8:0, F8:13<F8:0 then F8:14<F8:0,
F8:15<F8:0 then F8:16<F8:0, F8:17<F8:0 then F8:18<F8:0, F8:19<F8:0. The function will continue until a false statement is found, or the comparison completes. If the comparison completes with no false statements the output A will then be true. The mode could have also been All to execute all the comparisons in one scan, or Increment to update when the input to the function is true - in this case the input is a plain wire, so it will always be true.
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A |
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Control R6:0 |
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Length 10 |
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Position 0 |
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Expression #F8:10 < F8:0 |
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Figure 15.21 File Comparison Using Expressions