- •Table of Contents
- •Index
- •Keyword Reference
- •Installation
- •Installation of BASCOM
- •BASCOM IDE
- •Running BASCOM-AVR
- •File New
- •File Close
- •File Save
- •File Save As
- •File Print Preview
- •File Print
- •File Exit
- •View PinOut
- •View PDF viewer
- •View Error Panel
- •Edit Undo
- •Edit Redo
- •Edit Cut
- •Edit Copy
- •Edit Paste
- •Edit Find
- •Edit Find Next
- •Edit Replace
- •Edit Goto
- •Edit Toggle Bookmark
- •Edit Goto Bookmark
- •Edit Indent Block
- •Edit Unindent Block
- •Edit Remark Block
- •Program Compile
- •Program Syntax Check
- •Program Show Result
- •Program Simulate
- •Program Send to Chip
- •Tools Terminal Emulator
- •Tools LCD Designer
- •Tools LIB Manager
- •Tools Graphic Converter
- •Tools Stack Analyzer
- •Tools Plugin Manager
- •Tools Batch Compile
- •Options Compiler
- •Options Compiler Chip
- •Options Compiler Output
- •Options Compiler Communication
- •Options Compiler I2C, SPI, 1WIRE
- •Options Compiler LCD
- •Options Communication
- •Options Environment
- •Options Simulator
- •Options Programmer
- •Supported Programmers
- •ISP programmer
- •PG302 programmer
- •Sample Electronics cable programmer
- •KITSRUS Programmer
- •MCS Universal Interface Programmer
- •STK500 Programmer
- •Lawicel BootLoader
- •AVR ISP Programmer
- •USB-ISP Programmer
- •MCS Bootloader
- •Options Monitor
- •Options Printer
- •Window Cascade
- •Window Tile
- •Window Arrange Icons
- •Window Minimize All
- •Help About
- •Help Index
- •Help MCS Forum
- •Help MCS Shop
- •Help Support
- •Help Knowledge Base
- •Help Credits
- •BASCOM Editor Keys
- •Program Development Order
- •PlugIns
- •Font Editor
- •PinOut
- •BASCOM HARDWARE
- •Additional Hardware
- •AVR Internal Hardware
- •AVR Internal Registers
- •AVR Internal Hardware TIMER0
- •AVR Internal Hardware TIMER1
- •AVR Internal Hardware Watchdog timer
- •AVR Internal Hardware Port B
- •AVR Internal Hardware Port D
- •Adding XRAM
- •Attaching an LCD Display
- •Memory usage
- •Using the 1 WIRE protocol
- •Using the SPI protocol
- •Power Up
- •Chips
- •ATtiny22
- •ATtiny13
- •ATtiny15
- •ATtiny25
- •ATtiny45
- •ATtiny85
- •ATtiny26
- •ATtiny2313
- •ATMEGA8
- •ATMEGA16
- •ATMEGA32
- •ATMEGA48
- •ATMEGA88
- •ATMEGA168
- •ATMEGA64
- •ATMEGA103
- •ATMEGA128
- •ATMEGA161
- •ATMEGA162
- •ATMEGA163
- •ATMEGA165
- •ATMEGA169
- •ATMEGA323
- •ATMEGA603
- •ATMEGA8515
- •ATMEGA8535
- •BASCOM Language Fundamentals
- •Changes compared to BASCOM-8051
- •Language Fundamentals
- •Mixing ASM and BASIC
- •Assembler mnemonics
- •Reserved Words
- •Error Codes
- •Newbie problems
- •Tips and tricks
- •ASCII chart
- •BASCOM Language Reference
- •$BAUD
- •$BAUD1
- •$BOOT
- •$CRYSTAL
- •$DATA
- •$DEFAULT
- •$EEPLEAVE
- •$EEPROM
- •$EEPROMHEX
- •$EXTERNAL
- •$FRAMESIZE
- •$HWSTACK
- •$INCLUDE
- •$INITMICRO
- •$LCDPUTCTRL
- •$LCDPUTDATA
- •$LCDRS
- •$LCDVFO
- •$LOADER
- •$LOADERSIZE
- •$NOCOMP
- •$NOINIT
- •$NORAMCLEAR
- •$PROG
- •$PROGRAMMER
- •$REGFILE
- •$ROMSTART
- •$SERIALINPUT
- •$SERIALINPUT1
- •$SERIALINPUT2LCD
- •$SERIALOUTPUT
- •$SERIALOUTPUT1
- •$SWSTACK
- •$TIMEOUT
- •$TINY
- •$WAITSTATE
- •$XRAMSIZE
- •$XRAMSTART
- •1WIRECOUNT
- •1WRESET
- •1WREAD
- •1WSEARCHFIRST
- •1WSEARCHNEXT
- •1WVERIFY
- •1WWRITE
- •ACOS
- •ALIAS
- •ASIN
- •BASE64DEC
- •BASE64ENC
- •BAUD
- •BAUD1
- •BINVAL
- •BIN2GRAY
- •BITWAIT
- •BITS
- •BLOAD
- •BSAVE
- •BUFSPACE
- •BYVAL
- •CALL
- •CHECKSUM
- •CIRCLE
- •CLEAR
- •CLOCKDIVISION
- •CLOSE
- •CLOSESOCKET
- •CONFIG
- •CONFIG 1WIRE
- •CONFIG ACI
- •CONFIG ADC
- •CONFIG ATEMU
- •CONFIG BCCARD
- •CONFIG CLOCK
- •CONFIG CLOCKDIV
- •CONFIG COM1
- •CONFIG COM2
- •CONFIG COMx
- •CONFIG DATE
- •CONFIG DCF77
- •CONFIG DEBOUNCE
- •CONFIG I2CDELAY
- •CONFIG I2CSLAVE
- •CONFIG INPUT
- •CONFIG INTx
- •CONFIG GRAPHLCD
- •CONFIG KBD
- •CONFIG KEYBOARD
- •CONFIG LCD
- •CONFIG LCDBUS
- •CONFIG LCDMODE
- •CONFIG LCDPIN
- •CONFIG PORT
- •CONFIG PRINT
- •CONFIG PRINTBIN
- •CONFIG PS2EMU
- •CONFIG RC5
- •CONFIG SDA
- •CONFIG SCL
- •CONFIG SERIALIN
- •CONFIG SERIALIN1
- •CONFIG SERIALOUT
- •CONFIG SERIALOUT1
- •CONFIG SINGLE
- •CONFIG SPI
- •CONFIG SERVOS
- •CONFIG TCPIP
- •CONFIG TIMER0
- •CONFIG TIMER1
- •CONFIG TIMER2
- •CONFIG TWI
- •CONFIG TWISLAVE
- •CONFIG WAITSUART
- •CONFIG WATCHDOG
- •CONFIG X10
- •CONFIG XRAM
- •CONST
- •COSH
- •COUNTER0 and COUNTER1
- •CPEEK
- •CPEEKH
- •CRYSTAL
- •CURSOR
- •DATA
- •DAYOFWEEK
- •DAYOFYEAR
- •DATE$
- •DATE
- •DEBUG
- •DEBOUNCE
- •DECR
- •DECLARE FUNCTION
- •DECLARE SUB
- •DEFxxx
- •DEFLCDCHAR
- •DELAY
- •DISABLE
- •DISKFREE
- •DISKSIZE
- •DISPLAY
- •DO-LOOP
- •DriveCheck
- •DriveGetIdentity
- •DriveInit
- •DriveReset
- •DriveReadSector
- •DriveWriteSector
- •DTMFOUT
- •ECHO
- •ELSE
- •ENABLE
- •ENCODER
- •EXIT
- •FILEATTR
- •FILEDATE
- •FILEDATETIME
- •FILELEN
- •FILETIME
- •FLUSH
- •FORMAT
- •FOR-NEXT
- •FOURTHLINE
- •FRAC
- •FREEFILE
- •FUSING
- •GETADC
- •GETATKBD
- •GETATKBDRAW
- •GETDSTIP
- •GETDSTPORT
- •GETKBD
- •GETRC
- •GETRC5
- •GETTCPREGS
- •GETSOCKET
- •GLCDCMD
- •GLCDDATA
- •GOSUB
- •GOTO
- •GRAY2BIN
- •HEXVAL
- •HIGH
- •HIGHW
- •HOME
- •I2CINIT
- •I2CRECEIVE
- •I2CSEND
- •I2START,I2CSTOP, I2CRBYTE, I2CWBYTE
- •IDLE
- •IF-THEN-ELSE-END IF
- •INCR
- •INITFILESYSTEM
- •INITLCD
- •INKEY
- •INPUTBIN
- •INPUTHEX
- •INPUT
- •INSTR
- •ISCHARWAITING
- •KILL
- •LCASE
- •LCDAT
- •LCDCONTRAST
- •LEFT
- •LINE
- •LINE INPUT
- •LTRIM
- •LOAD
- •LOADADR
- •LOADLABEL
- •LOADWORDADR
- •LOCAL
- •LOCATE
- •LOOKDOWN
- •LOOKUP
- •LOOKUPSTR
- •LOWERLINE
- •MAKEBCD
- •MAKEINT
- •MAKEDEC
- •MAKETCP
- •MEMCOPY
- •NBITS
- •ON INTERRUPT
- •ON VALUE
- •OPEN
- •PEEK
- •POKE
- •POPALL
- •POWER
- •POWERDOWN
- •POWERSAVE
- •PRINTBIN
- •PSET
- •PS2MOUSEXY
- •PULSEIN
- •PULSEOUT
- •PUSHALL
- •RC5SEND
- •RC5SENDEXT
- •RC6SEND
- •READ
- •READEEPROM
- •READMAGCARD
- •RESET
- •RESTORE
- •RETURN
- •RIGHT
- •ROTATE
- •ROUND
- •RTRIM
- •SECELAPSED
- •SECOFDAY
- •SEEK
- •SELECT-CASE-END SELECT
- •SETFONT
- •SETTCP
- •SETTCPREGS
- •SENDSCAN
- •SENDSCANKBD
- •SERIN
- •SEROUT
- •SETIPPROTOCOL
- •SHIFT
- •SHIFTCURSOR
- •SHIFTIN
- •SHIFTOUT
- •SHIFTLCD
- •SHOWPIC
- •SHOWPICE
- •SINH
- •SOCKETCONNECT
- •SOCKETLISTEN
- •SOCKETSTAT
- •SONYSEND
- •SOUND
- •SPACE
- •SPIIN
- •SPIINIT
- •SPIMOVE
- •SPIOUT
- •SPLIT
- •START
- •STCHECK
- •STOP
- •STRING
- •SYSSEC
- •SYSSECELAPSED
- •SYSDAY
- •SWAP
- •TCPCHECKSUM
- •TCPREAD
- •TCPWRITE
- •TCPWRITESTR
- •TANH
- •THIRDLINE
- •TIME$
- •TIME
- •TOGGLE
- •TRIM
- •UCASE
- •UDPREAD
- •UDPWRITE
- •UDPWRITESTR
- •UPPERLINE
- •VARPTR
- •VERSION
- •WAIT
- •WAITKEY
- •WAITMS
- •WAITUS
- •WHILE-WEND
- •WRITE
- •WRITEEEPROM
- •X10DETECT
- •X10SEND
- •#IF ELSE ENDIF
- •International Resellers
- •International Resellers
- •ASM Libraries
- •EXTENDED I2C
- •MCSBYTE
- •MCSBYTEINT
- •TCPIP
- •LCD4BUSY
- •GLCD
- •GLCDSED
- •LCD-EPSON
- •AVR-DOS File System
- •CF Card
- •Compact FlashCard Driver
- •Elektor CF-Interface
- •XRAM CF-Interface for simulation
- •New CF-Card Drivers
- •Floating Point
- •FP_TRIG
- •DOUBLE
- •I2C SLAVE
- •I2CSLAVE
- •I2C TWI Slave
- •SPISLAVE
- •DATE TIME
- •EUROTIMEDATE
- •DATETIME
- •PS2-AT Mouse and Keyboard Emulation
- •AT_EMULATOR
- •PS2MOUSE_EMULATOR
- •BCCARD
- •BCCARD
- •BCDEF
- •BCCALL
- •BCRESET
- •Tools
- •LCD RGB-8 Converter
© MCS Electronics, 1995-2007
$external Test
'this is needed so the parameters will be placed correct on the stack Declare Sub Test(byval X As Byte , Y As Byte)
'reserve some space Dim Z As Byte
'call our own sub routine Call Test(1 , Z)
'z will be 2 in the used example End
When you use ports in your library you must use .equ to specify the address:
.equ EEDR=$1d
In R24, EEDR
This way the library manager knows the address of the port during compile time.
As an alternative precede the mnemonic with a * so the code will not be compiled into the lib. The address of the register will be resolved at run time in that case.
This chapter is not intended to teach you ASM programming. But when you find a topic is missing to interface BASCOM with ASM send me an email.
Translation
In version 1.11.7.5 of the compiler some mnemonics are translated when there is a need for.
For example, SBIC will work only on normal PORT registers. This because the address may not be greater then 5 bits as 3 bits are used for the pin number(0-7).
SBIC worked well in the old AVR chips(AT90Sxxxx) but in the Mega128 where PORTG is on a high address, it will not work.
You always needs a normal register when you want to manipulate the bits of an external register.
For example :
LDS r23, PORTG ; get value of PORTG register
SBR r23,128 ; set bit 7
STS PORTG, R23
The mnemonics that are translated by the compiler are : IN, OUT, SBIC, SBIS, SBI and CBI.
The compiler will use register R23 for this. So make sure it is not used.
Assembler mnemonics
BASCOM supports the mnemonics as defined by Atmel.
page -187-
© MCS Electronics, 1995-2007
The Assembler accepts mnemonic instructions from the instruction set.
A summary of the instruction set mnemonics and their parameters is given here. For a detailed description of the Instruction set, refer to the AVRData Book.
Mnemonics |
Operands |
Description |
Operation |
Flags |
Clock |
ARITHMETIC AND |
|
|
|
|
|
LOGIC |
|
|
|
|
|
INSTRUCTIONS |
|
|
|
|
|
ADD |
Rd, Rr |
Add without Carry |
Rd = Rd + Rr |
Z,C,N,V, |
1 |
|
|
|
|
H |
|
ADC |
Rd, Rr |
Add with Carry |
Rd = Rd + Rr + C |
Z,C,N,V, |
1 |
|
|
|
|
H |
|
SUB |
Rd, Rr |
Subtract without Carry |
Rd = Rd – Rr |
Z,C,N,V, |
1 |
|
|
|
|
H |
|
SUBI |
Rd, K |
Subtract Immediate |
Rd = Rd – K |
Z,C,N,V, |
1 |
|
|
|
|
H |
|
SBC |
Rd, Rr |
Subtract with Carry |
Rd = Rd - Rr - C |
Z,C,N,V, |
1 |
|
|
|
|
H |
|
SBCI |
Rd, K |
Subtract Immediate |
Rd = Rd - K - C |
Z,C,N,V, |
1 |
|
|
with Carry |
|
H |
|
AND |
Rd, Rr |
Logical AND |
Rd = Rd · Rr |
Z,N,V |
1 |
ANDI |
Rd, K |
Logical AND with |
Rd = Rd · K |
Z,N,V |
1 |
|
|
Immediate |
|
|
|
OR |
Rd, Rr |
Logical OR |
Rd = Rd v Rr |
Z,N,V |
1 |
ORI |
Rd, K |
Logical OR with |
Rd = Rd v K |
Z,N,V |
1 |
|
|
Immediate |
|
|
|
EOR |
Rd, Rr |
Exclusive OR |
Rd = Rd Å Rr |
Z,N,V |
1 |
COM |
Rd |
Ones Complement |
Rd = $FF - Rd |
Z,C,N,V |
1 |
NEG |
Rd |
Twos Complement |
Rd = $00 - Rd |
Z,C,N,V, |
1 |
|
|
|
|
H |
|
SBR |
Rd,K |
Set Bit(s) in Register |
Rd = Rd v K |
Z,N,V |
1 |
CBR |
Rd,K |
Clear Bit(s) in Register |
Rd = Rd · ($FFh - |
Z,N,V |
1 |
|
|
|
K) |
|
|
INC |
Rd |
Increment |
Rd = Rd + 1 |
Z,N,V |
1 |
DEC |
Rd |
Decrement |
Rd = Rd - 1 |
Z,N,V |
1 |
TST |
Rd |
Test for Zero or Minus |
Rd = Rd · Rd |
Z,N,V |
1 |
CLR |
Rd |
Clear Register |
Rd = Rd Å Rd |
Z,N,V |
1 |
SER |
Rd |
Set Register |
Rd = $FF |
None |
1 |
ADIW |
Rdl, K6 |
Add Immediate to Word |
Rdh:Rdl = Rdh:Rdl |
Z,C,N,V, |
2 |
|
|
|
+ K |
S |
|
Adiw r24, K6 |
|
|
|
|
|
SBIW |
Rdl, K6 |
Subtract Immediate |
Rdh:Rdl = Rdh:Rdl |
Z,C,N,V, |
2 |
|
|
from Word |
- K |
S |
|
Sbiw R24,K6 |
|
|
|
|
|
MUL |
Rd,Rr |
Multiply Unsigned |
R1, R0 = Rd * Rr |
C |
2 * |
BRANCH |
|
|
|
|
|
INSTRUCTIONS |
|
|
|
|
|
RJMP |
K |
Relative Jump |
PC = PC + k + 1 |
None |
2 |
IJMP |
|
Indirect Jump to (Z) |
PC = Z |
None |
2 |
|
|
|
|
|
|
page -188-
© MCS Electronics, 1995-2007
JMP |
K |
Jump |
PC = k |
None |
3 |
RCALL |
K |
Relative Call |
PC = PC + k + 1 |
None |
3 |
|
|
Subroutine |
|
|
|
ICALL |
|
Indirect Call to (Z) |
PC = Z |
None |
3 |
CALL |
K |
Call Subroutine |
PC = k |
None |
4 |
RET |
|
Subroutine Return |
PC = STACK |
None |
4 |
RETI |
|
Interrupt Return |
PC = STACK |
I |
4 |
CPSE |
Rd,Rr |
Compare, Skip if Equal |
if (Rd = Rr) PC = |
None |
1 / 2 |
|
|
|
PC + 2 or 3 |
|
|
CP |
Rd,Rr |
Compare |
Rd - Rr |
Z,C,N,V, |
1 |
|
|
|
|
H, |
|
CPC |
Rd,Rr |
Compare with Carry |
Rd - Rr - C |
Z,C,N,V, |
1 |
|
|
|
|
H |
|
CPI |
Rd,K |
Compare with |
Rd - K |
Z,C,N,V, |
1 |
|
|
Immediate |
|
H |
|
SBRC |
Rr, b |
Skip if Bit in Register |
If (Rr(b)=0) PC = |
None |
1 / 2 |
|
|
Cleared |
PC + 2 or 3 |
|
|
SBRS |
Rr, b |
Skip if Bit in Register |
If (Rr(b)=1) PC = |
None |
1 / 2 |
|
|
Set |
PC + 2 or 3 |
|
|
SBIC |
P, b |
Skip if Bit in I/O |
If(I/O(P,b)=0) PC |
None |
2 / 3 |
|
|
Register Cleared |
= PC + 2 or 3 |
|
|
SBIS |
P, b |
Skip if Bit in I/O |
If(I/O(P,b)=1) PC |
None |
2 / 3 |
|
|
Register Set |
= PC + 2 or 3 |
|
|
BRBS |
s, k |
Branch if Status Flag Set |
if (SREG(s) = 1) |
None |
1 / 2 |
|
|
|
then PC=PC+k + 1 |
|
|
BRBC |
s, k |
Branch if Status Flag |
if (SREG(s) = 0) |
None |
1 / 2 |
|
|
Cleared |
then PC=PC+k + 1 |
|
|
BREQ |
K |
Branch if Equal |
if (Z = 1) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRNE |
K |
Branch if Not Equal |
if (Z = 0) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRCS |
K |
Branch if Carry Set |
if (C = 1) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRCC |
K |
Branch if Carry Cleared |
if (C = 0) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRSH |
K |
Branch if Same or |
if (C = 0) then PC |
None |
1 / 2 |
|
|
Higher |
= PC + k + 1 |
|
|
BRLO |
K |
Branch if Lower |
if (C = 1) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRMI |
K |
Branch if Minus |
if (N = 1) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRPL |
K |
Branch if Plus |
if (N = 0) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRGE |
K |
Branch if Greater or |
if (N V= 0) then PC |
None |
1 / 2 |
|
|
Equal, Signed |
= PC+ k + 1 |
|
|
BRLT |
K |
Branch if Less Than, |
if (N V= 1) then PC |
None |
1 / 2 |
|
|
Signed |
= PC + k + 1 |
|
|
BRHS |
K |
Branch if Half Carry Flag |
if (H = 1) then PC |
None |
1 / 2 |
|
|
Set |
= PC + k + 1 |
|
|
BRHC |
K |
Branch if Half Carry Flag |
if (H = 0) then PC |
None |
1 / 2 |
|
|
Cleared |
= PC + k + 1 |
|
|
BRTS |
K |
Branch if T Flag Set |
if (T = 1) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
page -189-
© MCS Electronics, 1995-2007
BRTC |
K |
Branch if T Flag Cleared |
if (T = 0) then PC |
None |
1 / 2 |
|
|
|
= PC + k + 1 |
|
|
BRVS |
K |
Branch if Overflow Flag |
if (V = 1) then PC |
None |
1 / 2 |
|
|
is Set |
= PC + k + 1 |
|
|
BRVC |
K |
Branch if Overflow Flag |
if (V = 0) then PC |
None |
1 / 2 |
|
|
is Cleared |
= PC + k + 1 |
|
|
BRIE |
K |
Branch if Interrupt |
if ( I = 1) then PC |
None |
1 / 2 |
|
|
Enabled |
= PC + k + 1 |
|
|
BRID |
K |
Branch if Interrupt |
if ( I = 0) then PC |
None |
1 / 2 |
|
|
Disabled |
= PC + k + 1 |
|
|
DATA TRANSFER |
|
|
|
|
|
INSTRUCTIONS |
|
|
|
|
|
MOV |
Rd, Rr |
Copy Register |
Rd = Rr |
None |
1 |
LDI |
Rd, K |
Load Immediate |
Rd = K |
None |
1 |
LDS |
Rd, k |
Load Direct |
Rd = (k) |
None |
2 |
LD |
Rd, X |
Load Indirect |
Rd = (X) |
None |
2 |
LD |
Rd, X+ |
Load Indirect and |
Rd = (X), X = X + |
None |
2 |
|
|
Post-Increment |
1 |
|
|
LD |
Rd, -X |
Load Indirect and |
X = X - 1, Rd =(X) |
None |
2 |
|
|
Pre-Decrement |
|
|
|
LD |
Rd, Y |
Load Indirect |
Rd = (Y) |
None |
2 |
LD |
Rd, Y+ |
Load Indirect and |
Rd = (Y), Y = Y + |
None |
2 |
|
|
Post-Increment |
1 |
|
|
LD |
Rd, -Y |
Load Indirect and |
Y = Y - 1, Rd = (Y) |
None |
2 |
|
|
Pre-Decrement |
|
|
|
LDD |
Rd,Y+q |
Load Indirect with |
Rd = (Y + q) |
None |
2 |
|
|
Displacement |
|
|
|
LD |
Rd, Z |
Load Indirect |
Rd = (Z) |
None |
2 |
LD |
Rd, Z+ |
Load Indirect and |
Rd = (Z), Z = Z+1 |
None |
2 |
|
|
Post-Increment |
|
|
|
LD |
Rd, -Z |
Load Indirect and |
Z = Z - 1, Rd = (Z) |
None |
2 |
|
|
Pre-Decrement |
|
|
|
LDD |
Rd, Z+q |
Load Indirect with |
Rd = (Z + q) |
None |
2 |
|
|
Displacement |
|
|
|
STS |
k, Rr |
Store Direct |
(k) = Rr |
None |
2 |
ST |
X, Rr |
Store Indirect |
(X) = Rr |
None |
2 |
ST |
X+, Rr |
Store Indirect and |
(X) = Rr, X = X + |
None |
2 |
|
|
Post-Increment |
1 |
|
|
ST |
-X, Rr |
Store Indirect and |
X = X - 1, (X) = Rr |
None |
2 |
|
|
Pre-Decrement |
|
|
|
ST |
Y, Rr |
Store Indirect |
(Y) = Rr |
None |
2 |
ST |
Y+, Rr |
Store Indirect and |
(Y) = Rr, Y = Y + 1 |
None |
2 |
|
|
Post-Increment |
|
|
|
ST |
-Y, Rr |
Store Indirect and |
Y = Y - 1, (Y) = Rr |
None |
2 |
|
|
Pre-Decrement |
|
|
|
STD |
Y+q,Rr |
Store Indirect with |
(Y + q) = Rr |
None |
2 |
|
|
Displacement |
|
|
|
ST |
Z, Rr |
Store Indirect |
(Z) = Rr |
None |
2 |
ST |
Z+, Rr |
Store Indirect and |
(Z) = Rr, Z = Z + |
None |
2 |
|
|
Post-Increment |
1 |
|
|
ST |
-Z, Rr |
Store Indirect and |
Z = Z - 1, (Z) = Rr |
None |
2 |
|
|
Pre-Decrement |
|
|
|
|
|
|
|
|
|
page -190-
© MCS Electronics, 1995-2007
STD |
Z+q,Rr |
Store Indirect with |
(Z + q) = Rr |
None |
2 |
|
|
Displacement |
|
|
|
LPM |
|
Load Program Memory |
R0 =(Z) |
None |
3 |
IN |
Rd, P |
In Port |
Rd = P |
None |
1 |
OUT |
P, Rr |
Out Port |
P = Rr |
None |
1 |
PUSH |
Rr |
Push Register on Stack |
STACK = Rr |
None |
2 |
POP |
Rd |
Pop Register from Stack |
Rd = STACK |
None |
2 |
BIT AND |
|
|
|
|
|
BIT-TEST |
|
|
|
|
|
INSTRUCTIONS |
|
|
|
|
|
LSL |
Rd |
Logical Shift Left |
Rd(n+1) |
Z,C,N,V, |
1 |
|
|
|
=Rd(n),Rd(0)= |
H |
|
|
|
|
0,C=Rd(7) |
|
|
LSR |
Rd |
Logical Shift Right |
Rd(n) = Rd(n+1), |
Z,C,N,V |
1 |
|
|
|
Rd(7) =0, C=Rd(0) |
|
|
ROL |
Rd |
Rotate Left Through |
Rd(0) =C, Rd(n+1) |
Z,C,N,V, |
1 |
|
|
Carry |
=Rd(n),C=Rd(7) |
H |
|
ROR |
Rd |
Rotate Right Through |
Rd(7) =C,Rd(n) |
Z,C,N,V |
1 |
|
|
Carry |
=Rd(n+1),C¬Rd(0) |
|
|
ASR |
Rd |
Arithmetic Shift Right |
Rd(n) = Rd(n+1), |
Z,C,N,V |
1 |
|
|
|
n=0..6 |
|
|
SWAP |
Rd |
Swap Nibbles |
Rd(3..0) « Rd(7..4) |
None |
1 |
BSET |
S |
Flag Set |
SREG(s) = 1 |
SREG(s) |
1 |
BCLR |
S |
Flag Clear |
SREG(s) = 0 |
SREG(s) |
1 |
SBI |
P, b |
Set Bit in I/O Register |
I/O(P, b) = 1 |
None |
2 |
CBI |
P, b |
Clear Bit in I/O Register |
I/O(P, b) = 0 |
None |
2 |
BST |
Rr, b |
Bit Store from Register |
T = Rr(b) |
T |
1 |
|
|
to T |
|
|
|
BLD |
Rd, b |
Bit load from T to |
Rd(b) = T |
None |
1 |
|
|
Register |
|
|
|
SEC |
|
Set Carry |
C = 1 |
C |
1 |
CLC |
|
Clear Carry |
C = 0 |
C |
1 |
SEN |
|
Set Negative Flag |
N = 1 |
N |
1 |
CLN |
|
Clear Negative Flag |
N = 0 |
N |
1 |
SEZ |
|
Set Zero Flag |
Z = 1 |
Z |
1 |
CLZ |
|
Clear Zero Flag |
Z = 0 |
Z |
1 |
SEI |
|
Global Interrupt Enable |
I = 1 |
I |
1 |
CLI |
|
Global Interrupt Disable |
I = 0 |
I |
1 |
SES |
|
Set Signed Test Flag |
S = 1 |
S |
1 |
CLS |
|
Clear Signed Test Flag |
S = 0 |
S |
1 |
SEV |
|
Set Twos Complement |
V = 1 |
V |
1 |
|
|
Overflow |
|
|
|
CLV |
|
Clear Twos Complement |
V = 0 |
V |
1 |
|
|
Overflow |
|
|
|
SET |
|
Set T in SREG |
T = 1 |
T |
1 |
CLT |
|
Clear T in SREG |
T = 0 |
T |
1 |
SHE |
|
Set Half Carry Flag in |
H = 1 |
H |
1 |
|
|
SREG |
|
|
|
CLH |
|
Clear Half Carry Flag in |
H = 0 |
H |
1 |
|
|
SREG |
|
|
|
NOP |
|
No Operation |
|
None |
1 |
SLEEP |
|
Sleep |
|
None |
1 |
page -191-