Instrumentation Sensors Book

Output voltage VR/8

Figure 5.8 Transfer function for a 3-bit DAC.

sizes are not required as are required with binary resistors, because different reference currents can be generated with mirroring techniques. The reference current for the mirror is set by R1, which is normally an integral part of a voltage reference, such as a bandgap reference. The advantages of the mirroring technique include the following: the devices are smaller than resistors; they can be mirrored with an accuracy equal to or greater than with resistor ratios; and the impedance of the N-MOS switches is not critical, because of the high output impedance of the P-MOS current mirrors.

Commercial DACs, such as the DAC 0808, are shown in Figure 5.10. The DAC 0808 is an 8-bit converter using an R-2R ladder network, which will give an output resolution or accuracy of 1 in (28 − 1). The −1 is necessary, because the first number is 0, leaving 255 steps. This shows that an 8-bit DAC can reproduce an analog voltage to an accuracy of ±0.39% . For higher accuracy analog signals, a 12-bit commercial DAC would be used, which would give an accuracy of ±0.025%.

Figure 5.9 Typical DAC using a current mirror technique.

Figure 5.10 Block diagram of DAC 0800.

Example 5.6

A 4-bit DAC with a conversion frequency of 20 kHz and a reference voltage of 1.6V is used to generate a 1 kHz sine wave. Show the DAC voltage steps and output waveform.

Figure 5.11 shows the generation of the 1 kHz sine wave. In this example, the p-p voltage of the sine wave is generated by the 16 steps of the digital signal, thus giving peak voltages of 0V and 1.5V (1.6 × 15/16). With a 20 kHz conversion rate, an output voltage is obtained every 50s or 18°, so that using sin , the voltage of the sine wave can be calculated every 18°. This is given in column 2. The closest DAC voltage is then selected, and is given in column 3. These step voltages are then plotted as shown with the resulting sine wave. In practice, the conversion rate could be higher, giving a better approximation to a complete sine wave, and/or the resolution of the DAC could be increased. Shown also is the binary code from the DAC (4 bits only). A simple RC filter can smooth the step waveform to get the sine wave. The example is only to give the basic conversion idea.

Time x 0.1 ms

Figure 5.11 1-kHz sine waveform reproduced from a 4-bit DAC.

8 input encoder

3 bit output

Figure 5.13 3-bit flash converter.

when the analog voltage is higher than its reference input voltage. These outputs are then encoded to give a 3-bit digital word. The devices are very fast, but expensive and with limited applications. A number of flash converters are commercially available, including the 8-bit flash converter manufactured by Maxim (MAX 104), which gives a resolution of ±0.39% with an output sample rate of 1 GSPS (109 samples per second).

A Ramp-up or Stepped-up ADC is a low-speed device that compares the analog voltage to a ramp voltage generated by an integrator or a resistor network, as in a DAC. The voltage is ramped up, or stepped up, until the voltage from the DAC is within the resolution of the converter. When it equals the input voltage, the steps are counted, and the digital word count represents the analog input voltage. This method is slow, due to the time required for high counts, and is only used in low-speed applications. The device is a medium cost converter. A 12-bit device has a conversion time of approximately 5 ms.

Successive approximation is a parallel feedback ADC that feeds back a voltage from a DAC, as shown in Figure 5.14. A comparator compares the analog input voltage to the voltage from the DAC. The logic in the successive approximation method sets and compares each bit, starting with the MSB (b1). Starting with Vx at 0, the first step is to set b1 to 1, making Vx = VR/2, and then to compare it to the input voltage. If the input is larger, b1 remains at 1, and b2 is set to 1, making Vx = (3VR/4).

Figure 5.14 Successive approximation block diagram.

This new value is again compared to the input voltage, and so on. If Vx is greater than the input, b1 is reset to 0, and b2 is set to 1, and then compared to the input. This process is repeated to the LSB of the DAC.

This is a high-speed technique, since each bit is compared only once to the input. For instance, an 8-bit device needs to make only eight comparisons. On the other hand, if the DAC were ramped up, it would require 256 comparisons. This technique makes a high-speed, medium-cost DAC with good accuracy. This type of device can convert an analog voltage to 12-bit accuracy in 20s, and a less expensive device can convert an analog signal to 8-bit accuracy in 30 s [7].

Example 5.7

Use the sequence given above for a 4-bit successive approximation ADC to measure 3.7V, if the converter has a 4.8V reference (VR).

From the sequence above:

•Step 1

•Set b1 to 1 Vx = 4.8 × 8/16V = 2.4V

•Vin > 2.4V b1 is not reset and stays at 1 (MSB).

•Step 2

•Set b2 to 1 Vx = 2.4 + 4.8 × 4/16V = 3.6V

•Vin > 3.6V b2 is not reset and stays at 1.

•Step 3

•Set b3 to 1 Vx = 3.6 + 4.8 × 2/16V = 4.2V

•Vin < 4.2V b3 is reset and returns to 0.

•Step 4

•Set b4 to 1 Vx = 3.6 + 4.8 × 1/16V = 3.9V

•Vin < 3.9V b4 is reset and returns to 0 (LSB).

This shows that a binary word 1100 represents 3.7V.

Dual slope converters are low-cost devices with good accuracy, and are very tolerant of high noise levels in the analog signal, but are slow compared to other types of converters. It is the most common type of ramp converter, and is normally the choice for multimeters and applications where high speed is not required. A 12-bit conversion takes approximately 20 ms. A block diagram of the device is shown in Figure 5.15. The input voltage is fed to a comparator for a fixed period of time, charging up an integrating capacitor, which also averages out the noise in the input voltage. After the fixed time period, the input to the integrator is switched to a negative voltage reference, which is used to discharge the capacitor. During the charging time (TS), the output voltage from the integrator (Vout) is given by:

because Vin is constant

The total conversion time is 50 ms + 82 ms = 132 ms, and 82 ms is the capacitor

discharge time. Because of the linear relation between Vin and TR, Vref and VS can be chosen to give a direct reading of Vin.

Figure 5.16 shows the block diagram of the ADC0804, which is a commercial 8-bit ADC designed using CMOS technology with TTL-level compatible outputs. The device uses successive approximation to convert the analog input voltage to digital signal. The device has a very flexible design, and is microprocessor compatible. The 8-bit conversion time is 100 µs, and the manufacturer’s data sheets should be consulted for the device parameters [8].

5.3.4Sample and Hold

Analog signals are constantly changing, so for a converter to accurately measure the voltage at a specific time instant, a sample and hold technique is used to capture the voltage level and hold it long enough for the measurement to be made. Such a circuit is shown in Figure 5.17(a), with the waveforms shown in Figure 5.17(b). The CMOS switch in the sample and hold circuit has a low impedance when turned On, and a very high impedance when Off. The voltage across capacitor C follows the input analog voltage when the FET is On, and holds the dc level of the analog voltage when the FET is turned Off. During the Off period, the ADC measures the dc level of the analog voltage and converts it into a digital signal. Since the sampling frequency of the ADC is much higher than the frequency of the analog signal, the varying amplitude of the analog signal can be represented in a digital format during each sample period, and then stored in memory. The analog signal can be regenerated from the digital signal using a DAC. There is a time delay when using a sample and hold circuit, because of the time it takes to convert the analog voltage into its digital equivalent. This can be seen from the waveforms [9].

5.3.5Voltage to Frequency Converters

An alternative to the ADC is the voltage to frequency converter. After the analog voltage is converted to a frequency, it is then counted for a fixed interval of time, giv-

Figure 5.16 Block diagram of an LM 0804 ADC.

Figure 5.17 (a) Sample and hold circuit, and (b) waveforms for the circuit.

ing a count that is proportional to the frequency and the analog signal. Commercial units, such as the LM331 shown in Figure 5.18, are available for this conversion. These devices have a linear relation between voltage and frequency. The operating characteristics of the devices are given in the manufacturer’s data sheets.

The comparator compares the input voltage to the voltage across capacitor C2. If the input voltage is larger, then the comparator triggers the one-shot timer. The output of the timer will turn On the current source, charging C2 for a period of 1.1C1R2, making the voltage across C2 higher than the input voltage. At the end of the timing period, the current source is turned Off, the timer is reset, and C1R2 is discharged. The capacitor C2 will now discharge through R3 until it is equal to the input voltage, and the comparator again triggers the one-shot timer, starting a new cycle. The switched current source can be adjusted by R1.

Vcc

R1

Figure 5.18 Block diagram of an LM331 voltage to frequency converter.

5.4Data Acquisition Devices

The central processor is required to interface with a large number of sensors and to drive a number of actuators. The processor has a limited number of input and output ports, so that the data has to be channeled into the input ports via external units, such as multiplexers, and channeled out via demultiplexers to be distributed to the external actuators. The multiplexers work by time division multiplex. For instance, an 8-bit multiplexer will accept eight inputs, and output the signals one at a time under process control [10].

5.4.1Analog Multiplexers

A 4-bit analog multiplexer is shown in Figure 5.19. The analog input signals can be alternately switched by CMOS analog switches to the output buffer, similar to a rotary switch. A decoder controls the switches. The decoder has input enables and address bits. When the enables are 0, all the outputs from the decoder are 0, holding all of the analog switches Off. When the enables are 1, the address bits are decoded, so that only one of the control lines to the analog switches is a 1, turning the associated switch On and sending the signal to the output buffer. The output from the multiplexer is fed to the controller via an ADC. Analog multiplexers are commercially available with 4, 8, or 16 input channels to 1 output channel, such a device is the CD 4529. Analog demultiplexers are also commercially available.

5.4.2Digital Multiplexers

Figure 5.20 shows the block diagram of a 4-bit digital multiplexer. The operation is similar to an analog multiplexer, except that the inputs are digital. When the enable is 0, the outputs from the decoder are all 0, inhibiting data from going through the input NAND gates, and the data output is 0. When the enable is 1, the addresses are decoded, so that one output from the decoder is 1, which opens an input gate to allow the digital data on that channel to be outputted. Digital multiplexers are commercially available with 4, 8, or 16 input channels. An example of a 16-channel digital input device is the SN74150, and its companion device, the SN 74154, a 16-channel output demultiplexer.

Analog channels

CMOS switch

Figure 5.19 Analog multiplexer.