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Allen and Holberg - CMOS Analog Circuit Design

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Allen and Holberg - CMOS Analog Circuit Design

Page VI.3-5

CASCODE AMPLIFIER-CONTINUED

High Resistance Driver for the Inverter M1-M2

VDD

M2

VGG2

 

 

M4

 

 

 

 

 

 

 

Cgd1

vout

 

 

 

 

 

 

 

 

ro=

1

i

 

 

 

 

 

 

 

 

 

 

gds3+gds4

in

 

 

 

 

 

+

 

 

 

 

 

 

M1

 

 

 

 

 

 

 

 

 

 

 

v1

CΜ

 

 

 

 

M3

-

 

 

 

 

 

 

 

 

 

 

 

 

VSS

 

 

 

 

 

 

C2

 

 

 

 

 

 

+

 

 

+

 

 

 

 

 

 

iin

R1

C1

v1 gmv1

C3

R3

vout

 

 

 

-

 

 

-

 

 

 

 

 

 

R

1

= (g

ds3

+ g

ds4

)-1 R

3

= (g

ds1

+ g

ds2

)-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C1= Cgs1 + Cbd3 + Cbd4 + Cgd3 + Cgd4

 

 

 

 

 

 

 

 

 

 

C2 = Cgd1

 

C3 = Cbd1 + Cbd2 + Cgd2 + CL

 

 

 

 

 

 

 

 

 

vout(s)

=

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

iin(s)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

gm1

gm1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

G1G3 1s C2

 

 

 

 

 

 

 

 

 

1+ R

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(C

+C )+R (C

 

+C

)+g

m1

R

R

C s+(C

C

+C

C

+C

C

)R

R

s2

 

 

 

1

 

1

 

3

3 2

3

 

 

1

3

2

1

2

1

3

2

3

1

3

 

Allen and Holberg - CMOS Analog Circuit Design Page VI.3-6

Note:

d(s) = 1 + as + bs2

 

s

s

1

+

1

 

+

s2

= 1

1

 

= 1 s

 

 

p1p2

 

 

 

p1

 

p2

p1

 

p2

 

If |p2| >> |p1| , then

 

 

d(s) 1 s

+

s2

or p1 = 1

 

and p2

= a

 

 

p1

 

p1p2

a

 

 

b

Using this technique we get,

 

 

 

 

 

p1

 

 

1

 

1

 

R1(C1+C3)+R3(C2+C3)+gm1R1R3C2

gm1R1R3C2

 

 

 

 

 

(Miller effect on C2 causes p1 to be dominant; CM gm1R2Cgd1)

p2

gm1C2

 

 

 

 

 

 

C1C2+C1C3+C2C3

 

 

 

 

 

 

 

 

 

 

Allen and Holberg - CMOS Analog Circuit Design

Page VI.3-7

CASCODE AMPLIFIER - CONTINUED

How does the Cascode Amplifier solve this problem?

VDD

M5

VGG5

 

 

 

 

 

M2 vout

 

 

 

M4

VGG2

 

 

 

 

 

 

Cgd1

 

 

 

1

 

 

 

 

ro=gds3+gds4

iin

 

 

 

 

 

 

 

 

 

 

M1

 

 

 

M3

 

 

 

 

 

 

 

 

VSS

 

 

 

 

 

 

Cgd1

 

 

 

rds2

 

 

 

+

 

+

 

 

+

 

C2

r2

 

 

i

r1 v1

v

2

 

vout

in

gmv1

 

C3

r3

 

-

-

 

 

gm2(1+η)v2

-

 

 

 

 

 

 

 

r

1

= r

o

= (g

ds3

+ g

ds4

)-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C2

= Cgs2 + Csb2 + Cdb1 + Cgd1

1

r

 

 

= g

 

+ g

 

 

(1 + η ) -1

 

2

 

 

ds1

 

 

m 2

 

 

 

 

 

gm2

C3

= Cgd2 + Cdb2 + Cgd5 + Cdb5 + CL

r

 

 

 

gm2

 

+ g

 

-1

1

 

 

 

 

 

 

 

gds5

 

3

 

gds1 gds2

 

 

 

d s 5

 

Allen and Holberg - CMOS Analog Circuit Design

Page VI.3-8

Cascode amplifier with higher gain and output resistance

VDD

VGG4

M4

VGG3

M3

Vout

VGG2

M2

Vin

M1

VSS

io

+

D2

gm2 v1

rds2

 

 

gmbs2 v1

gm3v4

gmbs3 v4

rds3

 

 

 

vout

G1

D1=S2

 

 

+

+

 

 

+

=r'

 

 

 

 

 

vin

v1

rds1

rds4

v4

ds3

 

-

gm1vin

 

 

-

-

-

 

 

 

 

 

 

 

 

Allen and Holberg - CMOS Analog Circuit Design

Page VI.4-1

VI.4 - OUTPUT AMPLIFIERS

Requirements

1.Provide sufficient output power in the form of voltage or current.

2.Avoid signal distortion for large signal swings.

3.Be efficient.

4.Provide protection from abnormal conditions.

Types of Output Stages

1.Class A amplifier.

2.Source follower.

3.Push-Pull amplifier ( inverting and follower).

4.Substrate BJT.

5.Negative feedback (OP amp and resistive).

Allen and Holberg - CMOS Analog Circuit Design Page VI.4-2

CLASS A AMPLIFIER

VDD

 

VGG2

M2

IQ

Iout

 

Vout

Vin

M1

 

CL RL

VSS

 

KnW1

Iout+ = 2L1 (VDD VSS VT1) 2 IQ

KpW2

Iout - = 2L2 (VDD VGG2 |VT2|) 2 < Iout+

|Iout| determined by:

 

1. |Iout| = CL

dvout

= CL (slew rate)

 

 

dt

 

 

vout(peak)

 

 

2. |Iout| =

RL

 

 

 

 

 

 

 

 

 

PRL

 

 

 

Vout(peak) 2

Efficiency = Psupply

 

= (VDD + VSS)

25%

rout =

 

1

 

=

1

(typically large)

gds1

+ gds2

 

 

 

 

 

2λID

 

Allen and Holberg - CMOS Analog Circuit Design

Page VI.4-3

SOURCE FOLLOWER

N-Channel

 

Push Pull

 

 

VDD

 

VDD

vIN

M1

 

M1

 

vOUT

vIN

vOUT

VGG

M2

 

M2

 

VSS

 

VSS

Large Signal Characteristics

vOUT = vIN vGS1

Maximum Output Swing Limits

vOUT(MAX) = VDD VT1

(VT1 greater than VT0 because of vBS)

Single Channel Follower:

vOUT(MIN) = VSS

Push Pull Follower:

vOUT(MIN) = VSS + |VT2|

(VT2 greater than VT0 because of vBS)

Allen and Holberg - CMOS Analog Circuit Design

Page VI.4-4

SOURCE FOLLOWERS

Small Signal Characteristics

Single Channel Follower (Current source and active load):

C1

+

 

 

 

 

 

 

 

 

 

 

+

 

 

 

gm1vin

 

 

 

 

 

 

vin

 

 

 

gm1vout

 

 

 

rds1

rds2

C2

vout

 

 

 

g

mbs1 vout

 

 

 

 

 

 

 

gm2vgs2

 

 

 

-

 

 

 

 

 

 

 

-

 

 

 

 

 

 

 

 

 

 

Small Signal Voltage Transfer Function:

 

 

 

 

vout =

 

gm1

 

 

where gm2 = 0 if vGS2 = VG G

vin

 

 

gds1+gds2+gm1+gmbs1+gm2

 

 

 

 

Example:

 

 

 

 

 

W

10 µm

 

 

If VDD= VSS =5V, vOUT = 0V, iD = 100µA, and

 

 

L

=10 µm

,

then;

vout

 

 

 

 

 

 

 

 

 

 

41.23

 

= 0.4309 when vGS2 = vOUT

 

 

 

=

1+1+41.23(1+0.2723)+41.23

 

 

vin

 

 

 

 

 

vout

41.23

 

= 0.751 when vGS2 = VGG

 

 

 

 

=

1+1+41.23(1+0.2723)

 

 

 

vin

 

 

 

 

 

 

Approximation gives vout 0.786 (gds1= gds2 0)

 

 

 

 

 

 

 

 

vin

 

 

 

 

 

Output Resistance:

 

 

 

 

 

 

 

rout

=

 

 

1

 

 

where gm2 = 0 if vGS2 = VG G

 

 

gds1+gds2+gm1+gmbs1+gm2

 

 

 

 

 

 

 

 

 

rout = 10.5 KΩ (vGS2 = vOUT) and

rout = 18.4 KΩ (vGS2 = VGG)

 

Allen and Holberg - CMOS Analog Circuit Design

Page VI.4-5

SOURCE FOLLOWERS

Push Pull Source Follower

Model:

C1

+

M1

M2

 

 

 

 

+

gm1vin

gm2 vin

 

1

 

 

v

in

 

r

ds1

r

1

C2 v

out

 

gm1vout

gm2vout

gmbs1

ds2

gmbs2

 

 

-

 

 

 

-

 

 

 

 

 

 

 

 

 

Small Signal Voltage Transfer Function:

vout

= g

 

 

 

 

gm1 + gm 2

 

 

 

 

 

v

ds1

+ g

ds2

+ g

m1

+ g

mbs1

+ g

m2

+ g

m b s 2

in

 

 

 

 

 

 

Example:

 

 

 

 

 

 

 

 

 

 

 

 

 

If VDD = VSS = 5V, vOUT = 0V, iD = 100µA, and

W

L

then,

vout 41.23 + 28.28

vin = 1 + 0.5 + 41.23(1 + 0.2723) + 28.28(1 + 0.1268)

Output Resistance:

1

ro u t = gds1 + gds2 + gm 1 + gmbs1 + gm 2 + gm b s 2

10µm

=10µm

=0.81

=11.7KΩ

Allen and Holberg - CMOS Analog Circuit Design

Page VI.4-6

PUSH-PULL INVERTERING CMOS AMPLIFIER

Concept-

VDD

VTR2

vIN

VTR1

M2

+

-

Iout

Vout

+

 

-

M1

 

 

CL RL

VSS

Implementation-

VDD

M5

M1 M3

vIN

M2 M4

M6

VGG3

Iout

Vout

 

 

VGG4

CL

RL

M7 M8

VSS

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