AVR Instruction Set

LSL – Logical Shift Left

Description:

Shifts all bits in Rd one place to the left. Bit 0 is cleared. Bit 7 is loaded into the C Flag of the SREG. This operation effectively multiplies signed and unsigned values by two.

Operation:

(i)

←

H:Rd3

S:N V, For signed tests.

V:N C (For N and C after the shift)

N:R7

Set if MSB of the result is set; cleared otherwise.

Z:R7• R6 •R5• R4• R3 •R2• R1• R0

Set if the result is $00; cleared otherwise.

C:Rd7

Set if, before the shift, the MSB of Rd was set; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

Words: 1 (2 bytes)

Cycles: 1

99

0856I–AVR–07/10

LSR – Logical Shift Right

Description:

Shifts all bits in Rd one place to the right. Bit 7 is cleared. Bit 0 is loaded into the C Flag of the SREG. This operation effectively divides an unsigned value by two. The C Flag can be used to round the result.

S:N V, For signed tests.

V:N C (For N and C after the shift)

N:0

Z:R7• R6 •R5• R4• R3 •R2• R1• R0

Set if the result is $00; cleared otherwise.

C:Rd0

Set if, before the shift, the LSB of Rd was set; cleared otherwise.

R (Result) equals Rd after the operation.

Example:

Words: 1 (2 bytes)

Cycles: 1

100 AVR Instruction Set

0856I–AVR–07/10

AVR Instruction Set

MOV – Copy Register

Description:

This instruction makes a copy of one register into another. The source register Rr is left unchanged, while the destination register Rd is loaded with a copy of Rr.

Words: 1 (2 bytes)

Cycles: 1

101

0856I–AVR–07/10

MOVW – Copy Register Word

Description:

This instruction makes a copy of one register pair into another register pair. The source register pair Rr+1:Rr is left unchanged, while the destination register pair Rd+1:Rd is loaded with a copy of Rr + 1:Rr.

This instruction is not available in all devices. Refer to the device specific instruction set summary.

Operation:

(i)Rd+1:Rd ← Rr+1:Rr

Words: 1 (2 bytes)

Cycles: 1

102 AVR Instruction Set

0856I–AVR–07/10