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These values are given via the table IQUAxx (xx = 16, 24, 32, 40 for 16, 24, 32, 40 Kbps coding). In fact, as dqln(I), F(I), and W(I) only depends on |I| value, this table gives the address where these functions are located, depending only on |I|. This makes it possible to save memory.

3.7Transition Detector and Trigger Process

This implementation of the ADPCM algorithm has been conceived to follow a linear progress with a minimum of branch instructions for a maximum of clarity, and with regard to the G.726 recommendation. However, this module constitutes an exception. When a transition is detected, predictor coefficients and tone-detection variables take their reset value (0), while the speed control parameter is set to one, to go into fast adaptation mode. When a transition is detected, the chosen solution is to reset the variables concerned, then to skip the adaptation process where they are implied. In the opposite case, it avoids testing a transition variable at the end of the adaptation process.

The reset of the coefficients is performed using long-word instructions, to set two variables with one-cycle instruction, as shown below. The constraint for this capability is the alignment of the long words on even boundaries.

***********************************************************************************

***********************************************************************************

3.8Double Precision/Dual 16-Bit Arithmetic Use

The TMS320C54x DSP is a 16-bit processor, but its two read data buses allow it to perform dual data-memory access. Some long-word (32-bits) instructions are thus available, making possible 32-bit arithmetic. For these instructions, the long-word operand has to be aligned on an even word address in memory.

The first utilization of this feature is the double-precision requirement. In G.726 recommendation,

all variables can be implemented on 16-bit words, except the locked quantizer scale factor, yl(k), that needs a 19-bit resolution in Q15 format. The chosen solution is to implement it in a long-word as Q25 format with 29-bit resolution. That makes the format of the high-word

compatible with the format of the other scale factors (yu(k) and y(k) in Q9 format). To respect the required resolution, the 10 LSB of the low word must have been set to zero. The code below illustrates the possibility of using yl(k), depending on the required format:

30 G.726 Adaptive Differential Pulse Code Modulation (ADPCM) on the TMS320C54x DSP

SPRA118

Lastly, special instructions for dual 16-bit arithmetic are available. Dual 16-bit arithmetic can be chosen by setting the C16 bit of ST1.

In this case, the ALU considers the long-word as two separates 16-bit words. However, when using only the low-word for these special instructions, this bit need not be set. For instance, for the instruction DSUBT, subtract TREG from the long-word. For your purpose, this makes it possible to directly compute the exponent, in floating-point conversion (see section 3.2.2).

3.9Limitation of Coefficients Using Compare Unit

To ensure that the filters do no diverge, some variables and adapted coefficients are limited. That is the case for yu(k), al(k), a1(k), a2(k), while the others are implicitly limited.

For these limitations, the MIN and MAX instructions of the C54x are very useful. Shown here is a typical example of coefficient limitation:

**** Limit predictor coefficient a2(k) **** 5 cycles

3.10Sign Representation

Sign of a word is normally defined as: sign(x) = +1 if x w 0, else sign(x) = –1 This definition allows to use the property:

This sign representation is not very significant in computing arithmetic when using he two’s complement format. In this format, sign bits are non-significant leading bits: zero for a positive number, one for negative numbers. As a consequence, when loading 16-bit data in the 40-bit accumulator of the C54x, the high part of accumulator contains 16 sign bits of the data. These can be easily stored in memory due to the STH instruction. This representation is chosen for its sign distinction. So, this sign has the value:

sign = 0x0000 = 0 for positive data

sign = 0xFFFF = –1 for negative data

32 G.726 Adaptive Differential Pulse Code Modulation (ADPCM) on the TMS320C54x DSP