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IEEE draft standard.LVDS for SCI.1995

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Draft 1.3 November 27, 1995

IEEE

DIFFERENTIAL SIGNALS FOR SCI

P1596.3-1995

Annex C

Driver and receiver models

(informative)

C.1 Driver model

,A driver design model is illustrated in figure C.1. This simplified model is only intended to give an idea of Vhow to implement a near-constant-current differential driver. It is not necessarily a manufacturable or cost-effective design.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

l +V (2 V – 6.5 V)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

l +2.4 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

l +1.2 V

z Cra

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ra

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[ A+

 

 

 

 

[ A–

 

 

 

 

l

[ A+

 

 

 

[ A–

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+1.2

 

V Rc

 

 

 

 

 

 

 

 

 

k Voa

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Voa

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R| t

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vob

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rc

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vob

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

[ A–

 

 

 

 

A+

 

 

 

 

[ A–

 

 

A+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

z Crc

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

z Crb

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rb

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure C.1— Driver design model

Crb is intended to operate as a current sink; however, at any particular operating condition it is equivalent toa resistance Rb. The voltage on Cra is adjusted so that the attached transistor behaves like a voltage follower,providing the appearance of a resistance Ra connected to 2.4 V. The voltage on Crc is adjusted so that thesetransistors behave like termination resistors of value Rc. Rv t is the receiver termination.

4Values are selected and/or adjusted so that Rai+Roa and Rbi+Rob are closely matched, where the switchingtransistors have impedance of Roa and Rob. When so matched, the driver’s output characteristics are illustratedin figure C.2.

Ra

Roa

 

Voa

l +2.4 V

 

 

 

 

l +1.2 V

Rc

±Id R| t

 

 

Rb

Rob

Rc

 

m 0 V

 

 

Vob

 

 

 

Figure C.2— Driver impedance characteristics

Copyright 1995 IEEE. All rights reserved.

 

This is an unapproved IEEE Standards Draft, subject to change.

33

IEEE

Draft 1.3 November 27, 1995

P1596.3-1995

IEEE STANDARD FOR LOW-VOLTAGE

,Although constrained by the Ro (driver’s output impedance) specification, the value of Rc may besignificantly greater than the transmission line impedance of 50 Ω9 , to minimize driver power dissipation.

C.2 Receiver model

The receiver design model includes a terminating resistance (90 Ω – 110ΩR), as illustrated in figure C.3.

[ A'

latched

output

 

 

R| t

B'

 

Figure C.3— Receiver design model

The design of the receiver can be simplified by recognizing that the amplifier impedance need only be largecompared to the receiver’s termination impedance (100 ΩR). Also, it may be easier to take advantage of the

Afact that SCI signals are always clocked; a combined amplifier/latch (i.e. sense amp) may be easier to buildthan an amplifier followed by an independent latch.

C.3 Signal transmission model

The signal-transmission model, including the driver, transmission line, and termination resistance within thereceiver, is illustrated in figure C.4.

 

 

 

Voa

 

 

 

 

 

 

Z

 

 

 

 

Rc || (Ral +Roao

)

 

 

 

 

 

 

 

 

 

 

 

 

l +1.2V

 

±Id

 

 

R

 

 

 

 

 

 

 

 

 

 

 

 

| t

Rc || (Rbl +Robo )

Z

Vob

Figure C.4— Signal transmission model

 

Copyright 1995 IEEE. All rights reserved.

<34

This is an unapproved IEEE Standards Draft, subject to change.

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